dm9302 Davicom Semiconductor, Inc., dm9302 Datasheet - Page 20

• Manufacturer Part Number: dm9302
• Description: 10/100mbps Ethernet Fiber/twisted Pair Media Converter With Local Bus
• Manufacturer: Davicom Semiconductor, Inc.

6.14 RX Packet Length Low Register ( 20H )
6.15 RX Packet Length High Register ( 21H )
6.16 RX Additional Status Register ( 26H )
6.17 RX Additional Control Register ( 27H )
6.18 Vendor ID Registers (28H~29H)
6.19 Chip Revision Register (2CH)
6.20 Transmit Check Sum Control Register (31H)
20
7~3
7:0
7:0
7:0
Bit
Bit
Bit
7:0
7:0
7:0
7:0
7:0
7:0
7:0
7:4
1:0
6:0
Bit
Bit
Bit
Bit
2
1
0
7
RESERVED
RESERVED
RESERVED
CHIPR
UDPCSE
TCPCSE
Name
Name
VIDH
VIDL
RPTRS
RXPLH
RXPLL
IPCSE
MAB4
MAB3
MAB2
MAB1
MAB0
Name
RPRD
Name
Name
Name
Name
PE,0AH,RO
PE,46H.RO
01H,RO
Default
PHS0,RW
Default
Default
Default
Default
PH,RO
PH,RO
PH,RO
X,RW
X,RW
X,RW
X,RW
X,RW
Default
HP0,RW
HP0,RW
HP0,RW
0,RO
Default
0,RO
0,RO
10/100Mbps Ethernet Fiber/Twisted Pair Media Converter with Local bus
Multicast Address Byte 4 (1AH)
Multicast Address Byte 3 (19H)
Multicast Address Byte 2 (18H)
Multicast Address Byte 1 (17H)
Multicast Address Byte 0 (16H)
RX Packet Length Low byte
RX Packet Length High byte
Reserved
uP received pointer status, only available when RX pointer restriction is enabled
(Reg27h.7=0).
00: Within buffer
01: End of buffer
1x: Exceed buffer
CHIP Revision
Reserved
RX pointer restriction disable
Vendor ID High Byte (29H)
Vendor ID Low Byte (28H)
Reserved
UDP Checksum Generation Enable
TCP Checksum Generation Enable
IP Checksum Generation Enable
Description
Description
Description
Description
Description
Description
Description
DM9302
Preliminary datasheet
DM9302-15-DS-P01
July 30, 2009