dm9302 Davicom Semiconductor, Inc., dm9302 Datasheet - Page 29

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dm9302

Manufacturer Part Number
dm9302
Description
10/100mbps Ethernet Fiber/twisted Pair Media Converter With Local Bus
Manufacturer
Davicom Semiconductor, Inc.
Datasheet
6.43 Port-Based VLAN Mapping Table Registers (B0H~BFH)
Define the port member in VLAN group
There are 16 VLAN group that defined in Reg. B0H~BFH.
Group 0 defined in Reg. B0H, and group 1 defined in Reg. B1H, and so on.
6.44 TOS Priority Map Registers (C0H~CFH)
Define the 6-bit or 3-bit of ToS field mapping to 2-bit priority queue number.
In 6-bit type, the Reg. 53H bit 7 is “1”, Reg. C0H bit [1:0] define the mapping for ToS value 0, Reg. 60H bit [3:2] define the
mapping for ToS value 1, and so on, till Reg. CFH bit [7:6] define ToS value 63.
In 3-bit type, Reg. 53H bit 7 is “0” define the mapping for ToS value 0, Reg. 60H bit [3:2] define the mapping for ToS value 1,
and so on, till Reg. C1H bit [7:6] define ToS value 7.
Reg. C0H:
Reg. C1H:
Reg. C2H:
Reg. C3H:
Preliminary datasheet
DM9302-15-DS-P01
July 30, 2009
7:4
7:6
5:4
3:2
1:0
7:6
5:4
3:2
1:0
7:6
5:4
3:2
1:0
7:6
5:4
3:2
1:0
Bit
Bit
Bit
Bit
Bit
3
2
1
0
RESERVED
RESERVED
PORT_UP
PORT_P1
PORT_P0
TOSD
TOSC
Name
Name
Name
Name
TOSB
TOSA
Name
TOSF
TOSE
TOS3
TOS2
TOS1
TOS0
TOS7
TOS6
TOS5
TOS4
TOS9
TOS8
PE0/1,RW
PE0,/1RW
PE0/3,RW
PE0/3,RW
PE0/2,RW
PE0/2,RW
PE1,RW
PE1,RW
PE1,RW
PE0,RW
PE0,RW
PE0,RW
PE0,RW
PE0,RW
PE0,RW
PE1,RW
PE0,RW
PE0,RW
PE0,RW
PE0,RW
PE0,RO
Default
Default
Default
Default
Default
10/100Mbps Ethernet Fiber/Twisted Pair Media Converter with Local bus
Reserved
Mapping to processor
Reserved
Mapping to port 1
Mapping to port 0
If Reg. 53H. bit 7 =1 :TOS[7:2]=03H, otherwise TOS]7:5]=03H
If Reg. 53H. bit 7 =1 :TOS[7:2]=02H, otherwise TOS]7:5]=02H
If Reg.53H. bit 7 =1 :TOS[7:2]=01H, otherwise TOS]7:5]=01H
If Reg.53H. bit 7 =1 :TOS[7:2]=00H, otherwise TOS]7:5]=00H
If Reg.53H. bit 7=1 :TOS[7:2]=07H, otherwise TOS]7:5]=07H
If Reg.53H. bit 7=1 :TOS[7:2]=06H, otherwise TOS]7:5]=06H
If Reg.53H. bit 7=1 :TOS[7:2]=05H, otherwise TOS]7:5]=05H
If Reg.53H. bit 7=1 :TOS[7:2]=04H, otherwise TOS]7:5]=04H
If Reg.53H. bit 7=1 :TOS[7:2]=0BH
If Reg.53H. bit 7=1 :TOS[7:2]=0AH
If Reg.53H. bit 7=1 :TOS[7:2]=09H
If Reg.53H. bit 7=1 :TOS[7:2]=08H
If Reg.53H. bit 7=1 :TOS[7:2]=0FH
If Reg.53H. bit 7=1 :TOS[7:2]=0EH
If Reg.53H. bit 7=1 :TOS[7:2]=0DH
If Reg.53H. bit 7=1 :TOS[7:2]=0CH
Description
Description
Description
Description
Description
DM9302
29

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