dm9302 Davicom Semiconductor, Inc., dm9302 Datasheet - Page 33

• Manufacturer Part Number: dm9302
• Description: 10/100mbps Ethernet Fiber/twisted Pair Media Converter With Local Bus
• Manufacturer: Davicom Semiconductor, Inc.

6.51 Memory Data Write Command with Address Increment Register (F8H)
When register FFH bit 7 is “0”, register FBH value will be returned to 0000H, if 16K-byte boundary is reached.
6.52 Memory Data Write Address Register (FAH)
When register FFH bit 7 is “0”, register FBH and FAH can be used as memory byte address to write internal 64K-byte
memory.
When register FFH bit 7 is “1”, register FBH and FAH are reserved. The processor port transmit memory address is generated
by DM9302 automatically.
6.53 Memory Data Write Address Register (FBH)
6.54 TX Packet Length Registers (FCH~FDH)
6.55 Interrupt Status Register (FEH)
6.56 Interrupt Mask Register (FFH)
Preliminary datasheet
DM9302-15-DS-P01
July 30, 2009
Bit
Bit
7:0
7:0
7:0
7:0
7:0
Bit
Bit
Bit
Bit
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
RESERVED
RESERVED
CNT_ERR
CNT_ERR
TXRX_EN
LNKCHGI
MWCMD
LNKCHG
MDWAH
IOMODE
MDWAL
TXPLH
TXPLL
Name
Name
Name
Name
Name
Name
ROOI
ROO
ROS
ROI
PRI
PTI
PR
PT
PHS0,RW Memory Data Write_ address Low Byte[7:0]
PHS0,RW Memory Data Write Byte Address High Byte[15:8]
PHS0,RW TX Packet Length High byte
PHS0,RW TX Packet Length Low byte
PHS0,RW/C1
PHS0,RW/C1
PHS0,RW/C1
PHS0,RW/C1
PHS0,RW/C1
PHS0,RW/C1
PHS0,RW/C1
Default
Default
Default
Default
X,WO
PHS0,RW
PHS0,RW
PHS0,RW
PHS0,RW
PHS0,RW
PHS0,RW
PHS0,RO
Default
Default
T0, RO
P0,RO
10/100Mbps Ethernet Fiber/Twisted Pair Media Converter with Local bus
Write Data to TX SRAM
After the write of this command, the write pointer is increased by 1, 2, or 4, depends
on the operator mode. (8-bit, 16-bit,32-bit respectively)
Enable the SRAM read/write pointer used as transmit /receive address.
Reserved
Enable Link Status Change of port 0 or 1Interrupt
Enable Memory Management error interrupt
Enable Receive Overflow Counter Overflow Interrupt
Enable Receive Overflow Interrupt
Enable Packet Transmitted Interrupt
Enable Packet Received Interrupt
Width Processor Data Bus
0: 16-bit mode
1: 8-bit mode
Reserved
Link Status Change of port 0 or 1
Memory Management error
Receive Overflow Counter Overflow
Receive Overflow
Packet Transmitted
Packet Received
Description
Description
Description
Description
Description
Description
DM9302
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