x9525vzi Intersil Corporation, x9525vzi Datasheet - Page 8

• Manufacturer Part Number: x9525vzi
• Description: Dual Dcp, Eeprom Memory
• Manufacturer: Intersil Corporation

It should be noted that all writes to any DCP of the X9525
are random in nature. Therefore, the Data Byte of con-
secutive write operations to any DCP can differ by an
arbitrary number of bits. Also, setting the bits (P1 = 0,
P0 = 0) or (P1 = 1, P0 = 1) are reserved sequences, and
will result in no ACKNOWLEDGE after sending an
Instruction Byte on SDA.
The factory default setting of all “wiper position” settings
is with 00h stored in the NVM of the DCPs. This corre-
sponds to having the “wiper teminal” R
“lowest” tap position, therefore, the resistance between
R
Resistance, R
DCP Read Operation
A read of DCPx (x = 1,2) can be performed using the
three byte random read command sequence shown in
Figure 10.
WX
and R
Signals from
the Master
Signals from
the Slave
SDA Bus
LX
W
is a minimum (essentially only the Wiper
).
Signals from
Signals from
the Master
SDA Bus
the Slave
S
a
r
t
t
8
1 0 1
Address
Slave
Figure 11. EEPROM Byte Write Sequence
0
A
0
1 1
“Dummy” write
WX
S
a
t
r
t
WRITE Operation
Figure 10. DCP Read Sequence
1 0 1 0
0
(x = 1,2) at the
A
C
K
Address
Slave
W
T
Instruction
0 0 0 0
A
Address
0
Internal
Device
0 0
Byte
0
WRITE Operation
0
A
C
K
X9525
P
1
P
0
Address
A
C
K
Byte
S
a
r
t
t
The master issues the START condition and the Slave
Address Byte 1010A
“dummy” write” is to be conducted. This “dummy” write
operation sets which DCP is to be read (in the preceding
Read operation). An ACKNOWLEDGE is returned by the
X9525 after the Slave Address if received correctly. Next,
an Instruction Byte is issued on SDA. Bits P1 - P0 of the
Instruction Byte determine which DCP “wiper position” is
to be read. In this case, the state of the WT bit is “don’t
care”. If the Instruction Byte format is valid, then another
ACKNOWLEDGE is returned by the X9525.
Following this ACKNOWLEDGE, the master immediately
issues another START condition and a valid Slave
address byte with the R/W bit set to 1. Then the X9525
issues an ACKNOWLEDGE followed by Data Byte, and
finally, the master issues a STOP condition. The Data
Byte read in this operation, corresponds to the “wiper
position” (value of the WCR) of the DCP pointed to by
bits P1 and P0.
1 0 1
Address
Slave
0
A
0
C
A
K
1 1
READ Operation
1
Byte
A
C
K
Data
Data Byte
0
110 which specifies that a
C
A
K
MSB
-
“-” = DON’T CARE
S
o
p
t
S
o
p
t
LSB
DCPx
x = 1
x = 2
January 3, 2006
FN8210.1