tmp89fm82 TOSHIBA Semiconductor CORPORATION, tmp89fm82 Datasheet - Page 282

• Manufacturer Part Number: tmp89fm82
• Description: 8 Bit Microcontroller Tlcs-870/c1 Series
• Manufacturer: TOSHIBA Semiconductor CORPORATION

17.3
SEI Operation
RA000
17.3
17.3.1
17.3.2
ously. The serial clock (SECLK) synchronizes the timing at which information on the two serial data lines are shifted
or sampled. Slave device can be selected individually using the slave select pin (SS pin). For unselected slave devices,
data on the SEI bus cannot be taken in.
During a SEI transfer, data transmission (serial shift-out) and reception (serial shift-in) are performed simultane-
SEI Operation
control resister SECR<CPHL,CPOL>).
must have the same clock phase and polarity.
devices. Refer to Section “"17.5 SEI Transfer Formats "”.
The SEI clock can select its phase and polarity from four combinations available by using two bits in SEI
The clock polarity is set by <CPOL> to active-high or active-low.
The clock phase is set by <CPHA>. In order to comunicate among the master device and the slave devices, it
. Refer to Section “"17.5 SEI Transfer Formats "”. for detail.
The programmable data and clock timing of SEI allows connection to almost all synchronous serial peripheral
Controlling SEI clock polarity and phase
SEI data and clock timing
Table 17-2 Clock Phase and Polarity
CPHA
CPOL
SEI control register (SECR 0F7AH) bit 2
SEI control register (SECR 0F7AH) bit 3
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TMP89FM82