se97pw/1 NXP Semiconductors, se97pw/1 Datasheet - Page 13

• Manufacturer Part Number: se97pw/1
• Description: Se97 Memory Module Temp Sensor With Integrated Spd
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 4.
[1]
[2]
[3]
SE97_2
Product data sheet
Command
Normal EEPROM read/write
Reversible Write Protection (RWP)
Clear Reversible Write Protection (CRWP)
Permanent Write Protection (PWP)
Read RWP
Read CRWP
Read PWP
The most significant bit, bit 7, is sent first.
A0, A1, and A2 are compared against the respective external pins on the SE97.
V
I(ov)
ranges from 7 V to 10 V.
EEPROM commands summary
7.10.1.3 Acknowledge polling
7.10.2 Memory Protection
Acknowledge polling can be used to determine if the SE97 is busy writing or is ready to
accept commands. Polling is implemented by sending a ‘Selective Read’ command
(described in
acknowledge the slave address as long as internal write is in progress.
The lower half (the first 128 bytes) of the memory can be write protected by special
EEPROM commands without an external control pin. The SE97 features three types of
memory write protection instructions, and three respective read Protection instructions.
The level of write-protection (set or clear) that has been defined using these instructions
remained defined even after power cycle.
The memory protection commands are:
Table 4
This special EEPROM command consists of a unique 4-bit fixed address (0110b) and the
voltage level applied on the 3-bit hardware address. Normally, to address the memory
array, the 4-bit fixed address is ‘1010b’. To access the memory protection settings, the
4-bit fixed address is ‘0110b’.
sequence, respectively.
•
•
•
•
•
•
Permanent Write Protection (PWP)
Reversible Write Protection (RWP)
Clear Write Protection (CWP)
Read Permanent Write Protection (RPWP)
Read Reversible Write Protection (RRWP)
Read Clear Write Protection (RCWP)
is the summary for normal and memory protection instructions.
[2]
Section 7.10.3 “Read
Fixed address
Bit 7
1
0
0
0
0
0
0
Rev. 02 — 12 October 2007
[1]
Bit 6
0
1
1
1
1
1
1
Figure 14
operations”) to the device. The SE97 will not
Memory module temp sensor with integrated SPD
Bit 5
1
1
1
1
1
1
1
and
Figure 15
Bit 4
0
0
0
0
0
0
0
Hardware selectable
address
Bit 3
A2
V
V
A2
V
V
A2
show the write and read protection
SS
SS
SS
SS
Bit 2
A1
V
V
A1
V
V
A1
SS
DD
SS
DD
© NXP B.V. 2007. All rights reserved.
Bit 1
A0
V
V
A0
V
V
A0
I(ov)
I(ov)
I(ov)
I(ov)
[3]
[3]
[3]
[3]
SE97
R/W
Bit 0
R/W
0
0
0
1
1
1
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