se97pw/1 NXP Semiconductors, se97pw/1 Datasheet - Page 20

• Manufacturer Part Number: se97pw/1
• Description: Se97 Memory Module Temp Sensor With Integrated Spd
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 10.
SE97_2
Product data sheet
Bit
Symbol
Default
Access
Bit
Symbol
Default
Access
Configuration Register (address 01h) bit allocation
CTLB
8.3 Configuration Register (01h, 16-bit read/write)
R/W
15
R
0
7
0
Table 11.
Bit
15:11
10:9
8
AWLB
R/W
14
R
0
6
0
Symbol
RFU
HEN
SHMD
Configuration Register (address 01h) bit description
CEVNT
RFU
R/W
13
Description
reserved for future use; must be ‘0’.
Hysteresis Enable.
When enabled, hysteresis is applied to temperature movement around
trigger points. For example, consider the behavior of the ‘Above Alarm
Window’ bit (bit 14 of the Temperature register) when the hysteresis is set to
3 C. As the temperature rises, bit 14 will be set to ‘1’ (temperature is above
the alarm window) when the Temperature register contains a value that is
greater than the value in the Alarm Temperature Upper Boundary Register. If
the temperature decreases, bit 14 will remain set until the measured
temperature is less than or equal to the value in the Alarm Temperature
Upper Boundary register minus 3 C. (Refer to
Similarly, the ‘Below Alarm Window’ bit (bit 13 of the Temperature register)
will be set to ‘0’ (temperature is equal to or above the Alarm Window Lower
Boundary Trip Register) when the value in the Temperature register is equal
to or greater than the value in the Alarm Temperature Lower Boundary
Register. As the temperature decreases, bit 13 will be set to ‘1’ when the
value in the Temperature Register is equal to or less than the value in the
Alarm Temperature Lower Boundary Register minus 3 C. Note that
hysteresis is also applied to EVENT pin functionality.
When either of the lock bits is set, these bits cannot be altered.
Shutdown Mode.
When shut down, the thermal sensor diode and ADC are disabled to save
power, no events will be generated. When either of the lock bits is set, this bit
cannot be set until unlocked. However, it can be cleared at any time.
R
0
5
0
00 — disable hysteresis (default)
01 — enable hysteresis at 1.5 C
10 — enable hysteresis at 3 C
11 — enable hysteresis at 6 C
0 — enabled Temperature Sensor (default)
1 — disabled Temperature Sensor
Rev. 02 — 12 October 2007
ESTAT
R/W
12
R
0
4
0
Memory module temp sensor with integrated SPD
EOCTL
R/W
11
R
0
3
0
R/W
CVO
R/W
10
0
2
0
Figure 5
HEN
R/W
R/W
EP
9
0
and
1
0
© NXP B.V. 2007. All rights reserved.
Table
SE97
12).
SHMD
EMD
R/W
R/W
8
0
0
0
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