lm9627 National Semiconductor Corporation, lm9627 Datasheet - Page 13

• Manufacturer Part Number: lm9627
• Description: Color Cmos Image Sensor Vga 30 Fps
• Manufacturer: National Semiconductor Corporation

Functional Description
5.0
The LM9627 is capable of capturing a single frame of an image
under hardware or software control, with or without the aid of an
external
SNAPSHOTMODE1, are provided to program, monitor and con-
trol all snapshot sequences.
5.1
The snapshot mode events can be software controlled by writing
to and reading from the snapshot mode registers over the I
compatible interface.
5.2
Two dedicated pins are provided on the LM9627, snapshot &
extsync, allowing the snapshot mode events to be controlled by
hardware. The snapshot pin must be enabled by writing to the
SnapEnable bit of the MCFG0 register.
Note 1:
Note 2:
Note 3:
Confidential
Close shutter & start read-out
Start of Array Reset Frames
Start of Array Reset Frames
Start Snapshot Sequence
Start Snapshot sequence
SNAPSHOT MODE
Software Controlled Snapshots
Hardware Controlled Snapshots
Read-out Complete
Read-out complete
This wave form shows the snapshot pin programmed to the default pulse mode.
The irq pulse is taken low when the snapshot trigger interrupt flag (SsTrigFlag) in the snapshot mode1 (SNAPMODE1) register is read.
The irq pulse is taken low when the snapshot trigger interrupt flag (SsRdFlag) in the snapshot mode1 (SNAPMODE1 ) register is read.
shutter.
Integration Start
snapshot or FTriggerNow
snapshot or FTriggerNow
Start Read-out
Open Shutter
extsync or FtSync
extsync or FtSync
Two
FTriggerEn
FTriggerEn
registers,
FtBusy
FtBusy
irq
irq
(continued)
SNAPSHOTMODE0
note 1
note 1
programmable 1 to 4 frames
programmable 1 to 4 frames
note 2
note 2
a) With External Shutter
b) Without External Shutter
Figure 18. Snapshot Mode
Array reset,
Array reset,
2
C
&
13
5.3
In auto snapshot mode (see figure 20), upon the receipt of a
snapshot or
control circuit will set the FTriggerEN bit and generate an inter-
nal TRIGGER signal (see figure 19), thus resetting the array one
row at a time. At end of the reset cycle the timing and control cir-
cuit will signal the shutter to open via extsync pin or FtSync bit.
At the end of the programmed integration time the shutter will be
signalled to close, and the pixel read-out will commence as
shown in figure 18a. At the end of the read-out sequence the
FTriggerEN will be automatically reset and the sensor will return
to video capture mode as shown in figure 20.
If an external shutter is not available then at least two frames
need to be taken so that the pixels can be integrated over one
frame as shown in Figure 18b.
To use auto snapshot mode the SsEngage bit of the
SNAPSHOTMODE1 register must be set to zero.
Auto Snapshot Mode
Capture
Capture
image
image
FTriggerNow
read-out
read-out
Data
Data
trigger signal, the integrated timing and
note 3
note 3
Bold external pins
italic register bits
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