W83877 Winbond Electronics Corp America, W83877 Datasheet - Page 40
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W83877
Manufacturer Part Number
W83877
Description
Winbond I/O
Manufacturer
Winbond Electronics Corp America
Datasheet
1.W83877.pdf
(125 pages)
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DSKCHG (Bit 7):
This bit indicates the complement of the DSKCHG input.
Bit 6-3: These bits are always a logic 1 during a read.
DRATE1 DRATE0 (Bit 2, 1):
These two bits select the data rate of the FDC. Refer to the DR register bits 1 and 0 for the settings
corresponding to the individual data rates.
0
1
In the PS/2 Model 30 mode, the bit definitions are as follows:
DSKCHG (Bit 7):
This bit indicates the status of DSKCHG input.
Bit 6-4: These bits are always a logic 1 during a read.
DMAEN (Bit 3):
This bit indicates the value of DO REGISTER bit 3.
NOPREC (Bit 2):
HIGH DENS (Bit 0):
500 KB/S or 1 MB/S data rate (high density FDD)
250 KB/S or 300 KB/S data rate
7
7
1
6
6
0
1
5
5
0
1
4
0
4
1
3
3
- 40 -
2
2
1
1
0
0
DRATE1
HIGH DENS
DRATE0
DSKCHG
DSKCHG
DRATE0
NOPREC
DMAEN
DRATE1
W83877F