W83877 Winbond Electronics Corp America, W83877 Datasheet - Page 83

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W83877

Manufacturer Part Number
W83877
Description
Winbond I/O
Manufacturer
Winbond Electronics Corp America
Datasheet

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PEXTECP (Bit 1):
This bit controls whether the PEXTEN pin is active in ECP mode.
PEXTECPP (Bit 0):
This bit controls whether the PEXTEN pin is active in ECP/EPP mode.
8.2.12 Configuration Register B (CR0B), default = 0CH
When the device is in Extended Function mode and EFIR is 0BH, the CRB register can be accessed
through EFDR. The bit definitions are as follows:
Bit 7-5: These bits are reserved and are logic 0 during a read.
ENIFCHG (Bit 4):
This bit is active high. When active, it enables host interface mode change, which is determined by
IDENT (Bit 3) and MFM (Bit 2).
IDENT (Bit 3):
This bit indicates the type of drive being accessed and changes the level on RWC (pin 87).
When hardware reset or ENIFCHG is a logic 1, IDENT and MFM select one of three interface modes,
as shown in Table 7-5.
Table 7- 5
IDENT
1
0
1
0
1
0
1
PEXTEN is active in EPP mode
PEXTEN is not active in ECP mode
PEXTEN is active in ECP mode
PEXTEN is not active in ECP/EPP mode
PEXTEN is active in ECP/EPP mode
RWC will be active low for high data rates (typically used for 3.5" drives)
RWC will be active high for high data rates (typically used for 5.25" drives)
MFM
0
7
6
0
5
0
4
- 83 -
3
2
INTERFACE
1
0
DRV2EN
INVERTZ
IDENT
ENIFCHG
Publication Release Date: January 1996
MFM
W83877F
Revision A2

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