W83877 Winbond Electronics Corp America, W83877 Datasheet - Page 96

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W83877

Manufacturer Part Number
W83877
Description
Winbond I/O
Manufacturer
Winbond Electronics Corp America
Datasheet

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8.2.24 Configuration Register 1E (CR1E)
When the device is in Extended Function mode and EFIR is 1EH, the CR1E register can be accessed
through EFDR. Default = 81H if CR16 bit 2 = 1; default = 00H if CR16 bit 2 = 0. The bit definitions
are as follows:
This register is used to select the base address of Game Chip Select Decoder (GAMECS) from 100H-
3F0H on 16-byte boundaries. NCS = 0 and A10 = 0 are required to qualify the GAMECS output.
GMAD7-GMAD2 (bit 7-bit 2): match A[9:4].
GMAS1-GMAS0 (bit 1-bit 0): CAMECS configuration.
8.2.25 Configuration Register 20 (CR20)
When the device is in Extended Function mode and EFIR is 20H, the CR20 register can be accessed
through EFDR. Default = FCH if CR16 bit 2 = 1; default = 00H if CR16 bit 2 = 0. The bit definitions
are as follows:
This register is used to select the base address of the Floppy Disk Controller (FDC) from 100H-3F0H
on 16-byte boundaries. NCS = 0 and A10 = 0 are required to access the FDC registers. A[3:0] are
always decoded as 0xxxb.
FDCAD7-FDCAD2 (bit 7-bit 2): match A[9:4]. Bit 7 = 0 and bit 6 = 0 disable this decode.
Bit 1-bit 0: Reserved, fixed at zero.
8.2.26 Configuration Register 21 (CR21)
00
01
10
11
GAMECS disable
1-byte decode, A[3:0] = 0001b
8-byte decode, A[3:0] = 0xxxb
16-byte decode, A[3:0] = xxxxb
7
7
6
6
5
5
4
4
3
3
- 96 -
2
2
1
1
0
0
Reserved
Reserved
FDCAD2
FDCAD3
FDCAD4
FDCAD5
FDCAD6
FDCAD7
GMAS0
GMAS1
GMAD2
GMAD3
GMAD4
GMAD5
GMAD6
GMAD7
W83877F

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