zl2106 Intersil Corporation, zl2106 Datasheet
zl2106
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zl2106 Summary of contents
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... V to 5.5 V (with margin) from an input voltage between 4.5 V and 14 V. Internal low R synchronous power MOSFETs enable the DS(ON) ZL2106 to deliver continuous loads with high efficiency. An internal Schottky bootstrap diode reduces discrete component count. The ZL2106 also supports phase spreading to reduce system input capacitance. ...
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... Electrical Characteristics ...............................................................................................................................................3 2. Typical Performance Curves .........................................................................................................................................6 3. Pin Descriptions ............................................................................................................................................................8 4. Typical Application Circuit.........................................................................................................................................10 5. ZL2106 Overview .......................................................................................................................................................11 5.1 Digital-DC Architecture........................................................................................................................................11 5.2 Power Conversion Overview ................................................................................................................................11 5.3 Power Management Overview..............................................................................................................................13 5.4 Multi-mode Pins....................................................................................................................................................13 6. Power Conversion Functional Description..................................................................................................................15 6.1 Internal Bias Regulators and Input Supply Connections ......................................................................................15 6.2 High-side Driver Boost Circuit .............................................................................................................................15 6 ...
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... FR4 test board and the exposed metal pad soldered low impedance ground plane using multiple vias. 3. For θ , the “case” temperature is measured at the center of the exposed metal pad ZL2106 Pin VDDP, VDDS BST BST - SW VR VRA ...
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... Input clock frequency drift tolerance R of High Side N-channel FETs DS(ON Low Side N-channel FETs DS(ON) Notes: 1. Refer to Safe Operating Area in Figure 5 and thermal design guidelines in AN10. 2. Does not include margin limits. 4 ZL2106 1 Typical values are at T Conditions f = 200 kHz, no load MHz, no load ...
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... Factory default is the initial value in firmware. The value can be changed via PMBus commands. 9. Maximum duty cycle is limited by the equation MAX_DUTY(%) = [1 - (150×10 10 1/f , where f is the switching frequency ZL2106 1 Typical values are at T Conditions VTRK = 5.5 V 100% Tracking VTRK OUT 100% Tracking VTRK ...
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... Low-side R vs. T DS,ON Normalized for ° 0.3 A) DDS drain 1.4 1.3 1.2 1.1 1 0.9 0 (C) j Figure ZL2106 j (V 1.4 1.3 1.2 1.1 1 0.9 0.8 75 100 0 Low-side R vs. V with T DS,ON DDS (V) DDS Figure 4 High-side R vs. T DS,ON j Normalized for ° BST – 6 ...
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... For some applications, ZL2106 operating conditions (input voltage, output voltage, switching frequency, temperature) may require de-rating to remain within the Safe Operating Area (SOA). Note ≤ 125 ºC IN DDP DDS ≤ 125 °C ≤ ...
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... Pin Descriptions Figure 7. ZL2106 Pin Configurations (top view) Table 4. Pin Descriptions 1 Pin Label Type DGND PWR 2 3 SYNC I/ VSET SCL I/O 7 SDA I/O 8 SALRT CFG VTRK VSEN I SGND PWR 14 PGND ...
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... Notes Input Output, PWR = Power or Ground Multi-mode pins. Please refer to Section 5.4 “Multi-mode Pins,” on page 13. 9 ZL2106 Description Bias supply voltage for internal switching MOSFETs (return is PGND). IC supply voltage (return is SGND). Regulated bias from internal 7 V low-dropout regulator (return is PGND). Decouple with a 4.7 µ ...
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... Typical Application Circuit The following application circuit represents a typical implementation of the ZL2106. For PMBus operation recommended to tie the enable pin (EN) to SGND. Figure 3 Application Circuit 10 ZL2106 ( delay ramp) Data Sheet Revision 2/19/2009 www.intersil.com ...
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... The ZL2106 can be configured by simply connecting its pins according to the tables provided in the following sections. Additionally, a comprehensive set of application notes are available to help simplify the design process ...
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... ADC ADC TEMP TEMP SENSOR SENSOR Figure 10. ZL2106 Block Diagram N-channel power and switching frequency. This duty cycle limit ensures that the low-side MOSFET is allowed to turn on for a minimum amount of time during each switching cycle, which enables the bootstrap capacitor to be charged up and provide adequate gate drive voltage for the high- side MOSFET ...
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... The block diagram for the ZL2106 is illustrated in Figure 10. In this circuit, the target output voltage is regulated by connecting the VSEN pin directly to the output regulation point. The VSEN signal is then compared to an internal reference voltage that had been set to the desired output voltage level by the user ...
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... unique selections are available using a single resistor C/SMBus Method: ZL2106 functions can be 2 configured via the I C/SMBus interface using standard PMBus commands. Additionally, any value that has been configured using the pin-strap or resistor setting ...
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... Power Conversion Functional Description 6.1 Internal Bias Regulators and Input Supply Connections The ZL2106 employs three internal low dropout (LDO) regulators to supply bias voltages for internal circuitry, allowing it to operate from a single input supply. The internal bias regulators are as follows: VR: The VR LDO provides a regulated 7 V bias supply for the high-side MOSFET driver circuit ...
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... Table 7. ZL2106 Start-up Sequence Step # Step Name Input voltage is applied to the ZL2106’s VDD pins 1 Power Applied (VDDP and VDDS). The device will check for values stored in its internal Internal Memory 2 memory. This step is also performed after a Restore Check command. Multi-mode Pin ...
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... SS pin to SGND using the appropriate resistor value from . The value of this resistor is measured upon Table 10 start-up or Restore and will not change if the resistor is varied after power has been applied to the ZL2106 (see Figure 14). Figure 14. SS Pin Resistor Connections 17 ZL2106 Table 10 ...
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... Power Good (PG) The ZL2106 provides a Power Good (PG) signal that indicates the output voltage is within a specified tolerance of its target level and no fault condition exists. By default, the PG pin will assert if the output is within +15%/-10% of the target voltage. These limits 2 may be changed via the I C/SMBus interface ...
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... Table 12. Switching Frequency Selection SYNC Pin Frequency LOW OPEN HIGH Resistor See Table 13 If the user wishes to run the ZL2106 at a frequency not listed in Table 12, the switching frequency can be set using an external resistor connected between SYNC SYNC and SGND using Table 13. 19 ZL2106 Table 13 ...
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... Frequency Range Efficiency 200 – 400 kHz Highest 400 – 800 kHz Moderate 800 kHz – 1 MHz Lower 20 ZL2106 6.8.2 Inductor Selection Example Value The output inductor selection process must include several trade-offs. A high inductance value will result low ripple current (I 3.3 V ...
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... I opp Use these values to make an initial capacitor selection, using a single capacitor or several capacitors in parallel. 21 ZL2106 After a capacitor has been selected, the resulting output 2 voltage ripple can be calculated using the following equation: 2 Because each part of this equation was made to be less ...
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... However, in applications that require a high ambient operating temperature the user must perform some thermal analysis to ensure that the ZL2106’s maximum junction temperature is not exceeded. The ZL2106 has a maximum junction temperature limit of 125 °C, and the internal over temperature limiting circuitry will force the device to shut down if its junction temperature exceeds this threshold ...
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... Although the ZL2106 uses a digital control loop, it operates much like a traditional analog PWM controller. Figure simplified block diagram of the ZL2106 control loop, which differs from an analog control loop only by the constants in the PWM and compensation blocks the analog controller case, ...
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... Power Management Functional Description 7.1 Input Undervoltage Lockout The input undervoltage lockout (UVLO) prevents the ZL2106 from operating when the input falls below a preset threshold, indicating the input supply is out of its specified range. The UVLO threshold (V be set to either 4 10.8 V using the SS pin according to Table 10 ...
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... I C/SMBus. 7.5 Thermal Overload Protection The ZL2106 includes an on-chip thermal sensor that continuously measures the internal temperature of the die and will shutdown the device when the temperature exceeds the preset limit. The factory default temperature limit is set to 125 °C, but the user may set the limit to a different value if desired ...
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... VTRK pin. 26 ZL2106 2. Ratiometric. This mode configures the ZL2106 to ramp its output voltage at a rate that is a percentage of the voltage applied to the VTRK pin. The default setting is 50%, but an external resistor may be used to configure a different tracking ratio ...
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... PMBus command. Please refer to Application Note AN33 for more information on configuring tracking mode using PMBus. 7.7 Voltage Margining The ZL2106 offers a simple means to vary its output higher or lower than its nominal voltage setting in order to determine whether the load device is capable of operating over its specified supply voltage range. ...
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... The ZL2106 provides an I C/SMBus digital interface that enables the user to configure all aspects of the device operation as well as monitor the input and output parameters. The ZL2106 can be used with any 2 standard 2-wire I C host device. In addition, the device is compatible with SMBus version 2 ...
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... Multi-device sequencing can be achieved by configuring each device through the I interface or by using Zilker Labs patented autonomous sequencing mode. 29 ZL2106 Autonomous sequencing mode configures sequencing by using events transmitted between devices over the DDC bus. Table 20. CFG Pin Configurations for Sequencing and Tracking ...
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... Please refer to Application Note AN33 for details on how to monitor specific parameters via the I 7.15 Snapshot™ Parametric Capture The ZL2106 offers a special feature that enables the user to capture parametric data during normal operation or following a fault. The Snapshot functionality is enabled by setting bit 1 of MISC_CONFIG to 1 ...
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... Byte memory during start-up. During the initialization process, the ZL2106 checks for stored values contained in its internal memory. The ZL2106 offers two internal memory storage units that are accessible by the user as follows: 1. Default manufacturer may want to protect the module from damage by preventing the user from being able to modify certain values that are related to the physical construction of the module ...
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... Pin # top will be la ser ed Bila tera l copla na rity z one a pplies to the exposed hea t sink slug a s well a s the term ina ls This dra wing conf orm s to JEDEC registered outline MO ZL2106 DIMENSIONS DIMENSIONS S S θ degrees ...
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... Tools and Related Documentation The following application support documents and tools are available to help simplify your design. Item Description ZL2106EVK1 Evaluation Kit – ZL2106EV1, USB Adapter Board, GUI Software AN10 Application Note: Thermal and Layout Guidelines AN33 Application Note: PMBus Command Set ...
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... Assigned file number FN6852 to datasheet as this will be the first release with an Intersil file number. Replaced header and footer with Intersil header and footer. FN6852.0 Updated disclaimer information to read “Intersil and it’s subsidiaries including Zilker Labs, Inc.” No changes to datasheet content 34 ZL2106 Description Date August 2008 November 2008 February 2009 Data Sheet Revision 2/19/2009 www ...
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... OTHERWISE, RESULTING FROM THE REFERENCE DESIGNS OR ANY USE THEREOF. Any use of such reference designs is at your own risk and you agree to indemnify Intersil Corporation and it’s subsidiaries including Zilker Labs, Inc. for any damages resulting from such use. 35 ZL2106 Zilker Labs, Inc. Building A-100 Austin, TX 78746 ...