zl2106 Intersil Corporation, zl2106 Datasheet - Page 28

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zl2106

Manufacturer Part Number
zl2106
Description
6a Digital-dc Synchronous Step-down Dc-dc Converter
Manufacturer
Intersil Corporation
Datasheet

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7.8 I
The ZL2106 provides an I
that enables the user to configure all aspects of the
device operation as well as monitor the input and
output parameters. The ZL2106 can be used with any
standard 2-wire I
In addition, the device is compatible with SMBus
version 2.0 and includes an SALRT line to help
mitigate bandwidth limitations related to continuous
fault monitoring. Pull-up resistors are required on the
I
specification. The ZL2106 accepts most standard
PMBus commands. When controlling the device with
PMBus commands, it is recommended that the enable
pin is tied to SGND.
7.9 I
When communicating with multiple devices using the
I
unique address so the host can distinguish between the
devices. The device address can be set according to the
pin-strap options listed in Table 18. Address values are
right-justified.
Table 18. SMBus Device Address Selection
If additional device addresses are required, a resistor
can be connected to the SA pin according to
provide up to 30 unique device addresses.
2
2
C/SMBus
C/SMBus interface, each device must have its own
SA Pin Setting
2
2
C/SMBus Communications
C/SMBus Device Address Selection
OPEN
HIGH
LOW
as
2
C host device.
specified
28
2
C/SMBus digital interface
SMBus Address
in
the
0x20
0x21
0x22
SMBus
Table 19
2.0
to
ZL2106
Table 19. SMBus Address Values
7.10 Digital-DC Bus
The Digital-DC Communications (DDC) bus is used to
communicate between Zilker Labs Digital-DC devices.
This dedicated bus provides the communication
channel between devices for features such as
sequencing and fault spreading. The DDC pin on all
Digital-DC devices in an application should be
connected together. A pull-up resistor is required on
the DDC bus in order to guarantee the rise time as
follows:
Rise time = R
Where R
C
tied to VRA or to an external 3.3 V or 5 V supply as
long as this voltage is present prior to or during device
power-up. As rules of thumb, each device connected to
the DDC bus presents approx 10 pF of capacitive
loading, and each inch of FR4 PCB trace introduces
approx 2 pF. The ideal design will use a central pull-up
resistor that is well-matched to the total load
capacitance. In power module applications, the user
should consider whether to place the pull-up resistor on
the module or on the PCB of the end application.
The minimum pull-up resistance should be limited to a
value that enables any device to assert the bus to a
voltage that will ensure a logic 0 (typically 0.8 V at the
device monitoring point) given the pull-up voltage (5
V if tied to VRA) and the pull-down current capability
of the ZL2106 (nominally 4 mA).
LOAD
12.1 kΩ
13.3 kΩ
14.7 kΩ
16.2 kΩ
17.8 kΩ
19.6 kΩ
21.5 kΩ
23.7 kΩ
26.1 kΩ
28.7 kΩ
34.8 kΩ
31.6 kΩ
38.3 kΩ
10 kΩ
11 kΩ
R
SA
is the bus loading. The pull-up resistor may be
PU
is the DDC bus pull-up resistance and
PU
Address
SMBus
* C
0x2C
0x2D
0x2A
0x2B
0x2E
0x20
0x21
0x22
0x23
0x24
0x25
0x26
0x27
0x28
0x29
LOAD
≈ 1μs,
Data Sheet Revision 2/19/2009
100 kΩ
110 kΩ
121 kΩ
133 kΩ
147 kΩ
162 kΩ
42.2 kΩ
46.4 kΩ
51.1 kΩ
56.2 kΩ
61.9 kΩ
68.1 kΩ
82.5 kΩ
90.9 kΩ
75 kΩ
R
SA
www.intersil.com
Address
SMBus
0x3C
0x3D
0x2F
0x3A
0x3B
0x30
0x31
0x32
0x33
0x34
0x35
0x36
0x37
0x38
0x39

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