zl2106 Intersil Corporation, zl2106 Datasheet - Page 16

• Manufacturer Part Number: zl2106
• Description: 6a Digital-dc Synchronous Step-down Dc-dc Converter
• Manufacturer: Intersil Corporation

The resistor setting method can be used to set the
output voltage to levels not available in Table 6. To set
V
that corresponds to the desired voltage.
Table 8. Resistors for Setting Output Voltage
The output voltage may also be set to any value
between 0.6 V and 5.0 V using the I
Application Note AN33 for details.
6.4 Start-up Procedure
The ZL2106 follows a specific internal start-up
procedure after power is applied to the VDD pins
(VDDP and VDDS). Table 7 describes the start-up
sequence.
If the device is to be synchronized to an external clock
source, the clock frequency must be stable prior to
asserting
Table 7. ZL2106 Start-up Sequence
OUT
12.1 kΩ
13.3 kΩ
14.7 kΩ
16.2 kΩ
17.8 kΩ
19.6 kΩ
21.5 kΩ
23.7 kΩ
26.1 kΩ
28.7 kΩ
31.6 kΩ
34.8 kΩ
38.3 kΩ
42.2 kΩ
Step #
10 kΩ
11 kΩ
R
1
2
3
4
5
SET
using resistors, use
the
Internal Memory
Pre-ramp Delay
Multi-mode Pin
0.75 V
1.25 V
Power Applied
Device Ready
0.6 V
0.7 V
0.8 V
0.9 V
1.0 V
1.1 V
1.2 V
1.3 V
1.4 V
1.5 V
1.6 V
1.7 V
1.8 V
1.9 V
V
Step Name
OUT
EN
Check
Check
16
pin.
Table 8
The
46.4 kΩ
51.1 kΩ
56.2 kΩ
61.9 kΩ
68.1 kΩ
82.5 kΩ
90.9 kΩ
100 kΩ
110 kΩ
121 kΩ
133 kΩ
147 kΩ
162 kΩ
178 kΩ
75 kΩ
R
to select the resistor
SET
Input voltage is applied to the ZL2106’s VDD pins
(VDDP and VDDS).
The device will check for values stored in its internal
memory. This step is also performed after a Restore
command.
The device loads values configured by the multi-
mode pins.
The device is ready to accept an enable signal.
The device requires approximately 2 ms following an
enable signal and prior to ramping its output.
Additional pre-ramp delay may be configured using
the SS pin.
device
2
C interface. See
2.0 V
2.1 V
2.2 V
2.3 V
2.4 V
2.5 V
2.6 V
2.7 V
2.8 V
2.9 V
3.0 V
3.1 V
3.2 V
3.3 V
5.0 V
V
OUT
requires
ZL2106
Description
approximately 5-10 ms to check for specific values
stored in its internal memory. If the user has stored
values in memory, those values will be loaded. The
device will then check the status of all multi-mode pins
and load the values associated with the pin settings.
Once this process is completed, the device is ready to
accept commands via the I
device is ready to be enabled. Once enabled, the device
requires approximately 2 ms before its output voltage
may be allowed to start its ramp-up process. If a soft-
start delay period less than 2 ms has been configured
(using PMBus commands), the device will default to a
2 ms delay period. If a delay period greater than 2 ms
is configured, the device will wait for the configured
delay period prior to starting to ramp its output.
After the delay period has expired, the output will
begin to ramp towards its target voltage according to
the pre-configured soft-start ramp time that has been
set using the SS pin. It should be noted that if the EN
pin is tied to VDDP or VDDS, the device will still
require approximately 5-10 ms before the output can
begin its ramp-up as described in Table 7.
6.5 Soft Start Delay and Ramp Times
It may be necessary to set a delay from when an enable
signal is received until the output voltage starts to ramp
to its target value. In addition, the designer may wish
to set the time required for V
value after the delay period has expired. These features
may be used as part of an overall inrush current
management strategy or to control how fast a load IC is
turned on. The ZL2106 gives the system designer
several options for precisely and independently
controlling both the delay and ramp time periods.
Data Sheet Revision 2/19/2009
2
C/SMBus interface and the
Depends on input supply
Approx 5-10 ms (device
signal or PMBus traffic
will ignore an enable
OUT
Approximately 2 ms
during this period)
Time Duration
to ramp to its target
ramp time
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