zl2106 Intersil Corporation, zl2106 Datasheet - Page 27

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zl2106

Manufacturer Part Number
zl2106
Description
6a Digital-dc Synchronous Step-down Dc-dc Converter
Manufacturer
Intersil Corporation
Datasheet

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PMBus command. Please refer to Application Note
AN33 for more information on configuring tracking
mode using PMBus.
7.7 Voltage Margining
The ZL2106 offers a simple means to vary its output
higher or lower than its nominal voltage setting in
order to determine whether the load device is capable
of operating over its specified supply voltage range.
The MGN command is set by driving the MGN pin or
through the I
tri-level input that is continuously monitored and can
be driven directly by a processor I/O pin or other logic-
level output.
The ZL2106’s output will be forced higher than its
nominal set point when the MGN command is set
HIGH, and the output will be forced lower than its
nominal set point when the MGN command is set
Table 17. Tracking Mode Configuration
19.6 kΩ
21.5 kΩ
23.7 kΩ
26.1 kΩ
28.7 kΩ
31.6 kΩ
34.8 kΩ
38.3 kΩ
42.2 kΩ
46.4 kΩ
51.1 kΩ
56.2 kΩ
61.9 kΩ
68.1 kΩ
82.5 kΩ
75 kΩ
R
SS
2
C/SMBus interface. The MGN pin is a
UVLO
10.8V
4.5V
27
Tracking
100%
100%
Ratio
50%
50%
Upper Track Limit
Limited by VTRK
Limited by VTRK
Limited by VTRK
Limited by VTRK
Limited by target
Limited by target
Limited by target
Limited by target
pin voltage
pin voltage
pin voltage
pin voltage
voltage
voltage
voltage
voltage
ZL2106
LOW. Default margin limits of V
loaded in the factory, but the margin limits can be
modified through the I
as V
nominal output voltage set point determined by the
VSET pin. A safety feature prevents the user from
configuring the output voltage to exceed V
under any conditions.
The margin limits and the MGN command can both be
set individually through the I
Additionally, the transition rate between the nominal
output voltage and either margin limit can be
configured through the I
refer to Application Note AN33 for detailed
instructions
configurations.
NOM
Output not allowed to decrease before PG
Output not allowed to decrease before PG
Output not allowed to decrease before PG
Output not allowed to decrease before PG
Output not allowed to decrease before PG
Output not allowed to decrease before PG
Output not allowed to decrease before PG
Output not allowed to decrease before PG
+ 10% or as low as 0V, where V
Output will always follow VTRK
Output will always follow VTRK
Output will always follow VTRK
Output will always follow VTRK
Output will always follow VTRK
Output will always follow VTRK
Output will always follow VTRK
Output will always follow VTRK
Ramp-up/down Behavior
on
modifying
2
C/SMBus interface to as high
Data Sheet Revision 2/19/2009
2
C/SMBus interface. Please
2
C/SMBus interface.
NOM
the
www.intersil.com
±5% are pre-
NOM
NOM
margining
+ 10%
is the

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