attiny167-esxz ATMEL Corporation, attiny167-esxz Datasheet - Page 32

• Manufacturer Part Number: attiny167-esxz
• Description: 8-bit Avr 8-bit Microcontroller Microcontroller With 16k Bytes In-system Programmable Flash And Lin Controller
• Manufacturer: ATMEL Corporation

4.3.6
4.3.7
32
ATtiny167
System Clock Source Recovering
Clock Switching
CSUT1..0. The clock is declared ready (CLKRDY = 1) when the count limit value is reached.
The CLKRDY flag is reset when the count starts. Once set, this flag remains unchanged until a
new count is commanded. To perform this checking, the CKSEL and CSUT fields should not be
changed while the operation is running.
Note that once the new clock source is selected (‘Enable Clock Source’ command), the count
procedure is automatically started. The user (code) should wait for the setting of the CLKRDY
flag in CLKSCR register before using a newly selected clock.
At any time, the user (code) can ask for the availability of a clock source. The user (code) can
request it by writing the ‘Request for Clock Availability ’ command in the CLKSCR register. A full
polling of the status of clock sources can thus be done.
The ‘Recover System Clock Source’ command returns the current clock source used to drive the
system clock as per
updated with this returned value. There is no information on the SUT used or status on CKOUT.
To drive the system clock, the user can switch from the current clock source to any other of the
following ones (one of them being the current clock source):
1. Calibrated internal RC oscillator 8.0 MHz,
2. Internal watchdog oscillator 128 kHz,
3. External clock,
4. External low-frequency oscillator,
5. External Crystal/Ceramic Resonator.
The clock switching is performed by a sequence of commands. First, the user (code) must make
sure that the new clock source is operating. Then the ‘Clock Source Switching’ command can be
issued. Once this command has been successfully completed using the ‘Recover System Clock
Source’ command, the user (code) may stop the previous clock source. It is strongly recom-
mended to run this sequence only once the interrupts have been disabled. The user (code) is
responsible for the correct implementation of the clock switching sequence.
Table 4-1 on page
24. The CKSEL field of CLKSELR register is then
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