mb95f204h Fujitsu Microelectronics, Inc., mb95f204h Datasheet - Page 46

• Manufacturer Part Number: mb95f204h
• Description: F2mc-8fx Mb95200h/210h Series
• Manufacturer: Fujitsu Microelectronics, Inc.

46
MB95200H/210H Series
(6) LIN-UART Timing (Available in MB95F204H/F203H/F202H/F204K/F203K/F202K only)
Sampling is executed at the rising edge of the sampling clock*
(ESCR register : SCES bit = 0, ECCR register : SCDE bit = 0)
*1: There is a function used to choose whether the sampling of reception data is performed at a rising edge or a
*2: The serial clock delay function is a function used to delay the output signal of the serial clock for half the clock.
*3: See “ (2) Source Clock/Machine Clock” for t
Serial clock cycle time
SCK ↓→ SOT delay time
Valid SIN → SCK ↑
SCK ↑→ valid SIN hold time
Serial clock “L” pulse width
Serial clock “H” pulse width
SCK ↓ → SOT delay time
Valid SIN → SCK ↑
SCK ↑→ valid SIN hold time
SCK fall time
SCK rise time
falling edge of the serial clock.
Parameter
Symbol Pin name
t
t
t
t
t
t
t
t
t
SLOVE
SLOVI
IVSHE
SHIXE
SCYC
IVSHI
SHIXI
SLSH
SHSL
t
t
R
F
SCK
SCK, SOT
SCK, SIN
SCK, SIN
SCK
SCK
SCK, SOT
SCK, SIN
SCK, SIN
SCK
SCK
MCLK
(V
.
CC
= 5.0 V ± 10%, AV
operation output pin :
operation output pin :
C
C
L
L
External clock
Internal clock
= 80 pF + 1 TTL
= 80 pF + 1 TTL
Condition
1
, and serial clock delay is disabled*
SS
= V
SS
t
3 t
MCLK
t
t
MCLK
MCLK
= 0.0 V, T
5 t
MCLK
Min
− 95
190
*
MCLK
*
⎯
*
⎯
⎯
3
0
3
3
*
+ 190
3
+ 95
+ 95
*
− t
3
Value
R
A
= − 40 °C to + 85 °C)
2 t
MCLK
DS07-12623-1E
Max
+ 95
10
10
⎯
⎯
⎯
⎯
⎯
⎯
⎯
*
3
+ 95
2
.
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns