mb95f204h Fujitsu Microelectronics, Inc., mb95f204h Datasheet - Page 50

• Manufacturer Part Number: mb95f204h
• Description: F2mc-8fx Mb95200h/210h Series
• Manufacturer: Fujitsu Microelectronics, Inc.

50
MB95200H/210H Series
Sampling is executed at the rising edge of the sampling clock*
(ESCR register : SCES bit = 0, ECCR register : SCDE bit = 1)
*1: There is a function used to choose whether the sampling of reception data is performed at a rising edge or a
*2: The serial clock delay function is a function that delays the output signal of the serial clock for half clock.
*3: See “ (2) Source Clock/Machine Clock” for t
Serial clock cycle time
SCK↑→ SOT delay time
Valid SIN → SCK↓
SCK ↓→ valid SIN hold time
SOT → SCK ↓ delay time
falling edge of the serial clock.
SCK
SOT
SIN
Parameter
2.4 V
0.8 V
0.8 V
0.2 V
Symbol Pin name
t
t
t
t
t
SHOVI
SOVLI
SCYC
IVSLI
SLIXI
CC
CC
t
SOVLI
t
IVSLI
SCK
SCK, SOT
SCK, SIN
SCK, SIN
SCK, SOT
MCLK
.
0.8 V
operation output pin :
(V
C
L
CC
Internal clock
= 80 pF + 1 TTL
Condition
= 5.0 V ± 10%, V
t
SLIXI
2.4 V
1
, and serial clock delay is enabled*
t
SCYC
0.8 V
0.2 V
t
SHOVI
CC
CC
SS
2.4 V
0.8 V
t
MCLK
= 0.0 V, T
5 t
Min
− 95
*
MCLK
⎯
3
0
+ 190
*
3
0.8 V
Value
A
= − 40 °C to + 85 °C)
4 t
DS07-12623-1E
Max
+ 95
MCLK
⎯
⎯
⎯
*
3
2
.
Unit
ns
ns
ns
ns
ns