p8x32a Parallax, Inc., p8x32a Datasheet - Page 8

• Manufacturer Part Number: p8x32a
• Description: 8-cog Multiprocessor Microcontroller
• Manufacturer: Parallax, Inc.

Note: For the I/O Direction Register, a 1 in a bit location sets the corresponding I/O pin to the output direction; a 0 sets it to an input direction.
Propeller™ P8X32A Datasheet
4.5.
The Propeller has 32 I/O pins, 28 of which are general
purpose. I/O Pins 28 - 31 have a special purpose at boot
up and are available for general purpose use afterwards;
see section 2.2, page 4. After boot up, any I/O pins can
be used by any cogs at any time.
application developer to ensure that no two cogs try to use
the same I/O pin for different purposes during run time.
Each cog has its own 32-bit I/O Direction Register and
32-bit I/O Output Register.
Direction Register is OR’d with that of the previous cogs’
Direction Registers, and each cog’s output states is OR’d
with that of the previous cogs’ output states. Note that
each cog’s output states are made up of the OR’d states of
its internal I/O hardware and that is all AND’d with its
Direction Register’s states. The result is that each I/O
pin’s direction and output state is the “wired-OR” of the
entire cog collective. No electrical contention between
cogs is possible, yet they can all still access the I/O pins
simultaneously. The result of this I/O pin wiring
configuration can be described in the following rules:
4.6.
The System Counter is a global, read-only, 32-bit counter
that increments once every System Clock cycle. Cogs can
read the System Counter (via their CNT registers, see
Table 15 on page 15) to perform timing calculations and
can use the WAITCNT command (see section 6.3 on page
18 and section 6.4 on page 21) to create effective delays
within their processes. The System Counter is a common
resource which every cog can read simultaneously. The
System Counter is not cleared upon startup since its
practical use is for differential timing. If a cog needs to
keep track of time from a specific, fixed moment in time,
it simply needs to read and save the initial counter value
at that moment in time, and compare subsequent counter
values against that initial value.
Copyright © Parallax Inc.
Cog ID
Example 1
Example 2
Example 3
Example 4
Example 5
Example 6
Example 7
Example 8
I/O Pins
System Counter
Bit 12 of Cogs’ I/O Direction Register
0 1 2 3 4 5 6 7
0 0 0 0 0 0 0 0
1 0 0 0 0 0 0 0
1 0 0 0 0 0 0 0
1 0 0 0 0 0 0 0
1 1 0 0 0 0 0 0
1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1
1 1 1 0 1 1 1 1
The state of each cog’s
It is up to the
Table 3: I/O Sharing Examples
Bit 12 of Cogs’ I/O Output Register
Page 8 of 36
0 1 2 3 4 5 6 7
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
1 0 0 0 0 0 0 0
0 1 0 0 0 0 0 0
0 1 0 0 0 0 0 0
0 1 0 1 0 0 0 0
0 0 0 1 0 0 0 0
0 0 0 1 0 0 0 0
Table 3 demonstrates a few possible combinations of the
collective cogs’ influence on a particular I/O pin, P12 in
this example. For simplification, these examples assume
that bit 12 of each cog’s I/O hardware, other than its I/O
Output Register, is cleared to zero (0).
Any cog that is shut down has its Direction Register and
output states cleared to zero, effectively removing it from
influencing the final state of the I/O pins that the
remaining active cogs are controlling.
Each cog also has its own 32-bit Input Register. This
input register is really a pseudo-register; every time it is
read, the actual states of the I/O pins are read, regardless
of their input or output direction.
4.7.
There are eight lock bits (semaphores) available to
facilitate exclusive access to user-defined resources
among multiple cogs. If a block of memory is to be used
by two or more cogs at once and that block consists of
more than one long (four bytes), the cogs will each have
to perform multiple reads and writes to retrieve or update
that memory block. This leads to the likely possibility of
read/write contention on that memory block where one
cog may be writing while another is reading, resulting in
misreads and/or miswrites.
The locks are global bits accessed through the Hub via
LOCKNEW, LOCKRET, LOCKSET, and LOCKCLR.
locks are accessed only through the Hub, only one cog at
a time can affect them, making this an effective control
mechanism. The Hub maintains an inventory of which
locks are in use and their current states; cogs can check
out, return, set, and clear locks as needed during run time.
A. A pin is an input only if no active cog sets it to
B. A pin outputs low only if all active cogs that set
C. A pin outputs high if any active cog sets it to an
an output.
it to output also set it to low.
output and also sets it high.
Locks
I/O Pin P12
Output High
Output High
Output High
Output High
Output Low
Output Low
Output Low
State of
Input
Rev 1.0 11/14/2007
www.parallax.com
Followed
Rule
Because
C
C
C
C
A
B
B
B