mc56f801 Freescale Semiconductor, Inc, mc56f801 Datasheet - Page 121

• Manufacturer Part Number: mc56f801
• Description: 16-bit Digital Signal Controllers
• Manufacturer: Freescale Semiconductor, Inc

Module
TMR
SIM
SPI
Freescale Semiconductor
Preliminary
Control Register
Reset Status Register
Software Control Register 0-3
Most Significant Half JTAG ID
Least Significant Half JTAG ID
Power Control Register
Clock Out Select Register
GPIO Peripheral Select Register
Peripheral Clock Enable Register
I/O Short Address Location High
I/O Short Address Location Low
Status and Control Register
Data Size and Control Register
Data Receive Register
Data Transmit Register
Compare Register 1
Compare Register 2
Capture Register
Load Register
Hold Register
Counter Register
Control Register
Status and Control Register
Comparator Load Register 1
Comparator Load Register 2
Comparator Status/Control Register
Register Name
New Acronym
Peripheral Reference Manual
CMPLD1
CMPLD2
DSCTRL
CSCTRL
COMP1
COMP2
SCTRL
SCTRL
DXMIT
DRCV
LOAD
HOLD
CNTR
CAPT
CTRL
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
56F8014 Technical Data, Rev. 9
TMRCOMSCR
TMRCMPLD1
TMRCMPLD2
TMRCMP1
TMRCMP2
TMRLOAD
TMRHOLD
TMRCNTR
TMRCTRL
Acronym
TMRCAP
TMRSCR
SPDRR
Legacy
SPSCR
SPDSR
SPDTR
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
TMRn_CMPLD1
TMRn_CMPLD2
TMRn_CSCTRL
TMRn_COMP1
TMRn_COMP2
New Acronym
TMRn_SCTRL
SIM_CLKOUT
SPI_DSCTRL
SIM_SWC0-3
SIM_IOSALO
TMRn_CAPT
TMRn_LOAD
TMRn_HOLD
TMRn_CNTR
TMRn_CTRL
SIM_IOSAHI
SIM_RSTAT
SIM_MSHID
SPI_SCTRL
SIM_LSHID
SPI_DXMIT
SPI_DRCV
SIM_CTRL
SIM_PWR
SIM_GPS
SIM_PCE
Data Sheet
Legacy Acronym
TMRn_COMSCR
TMRn_CMPLD1
TMRn_CMPLD2
SIM_CONTROL
SIM_CLKOSR
SIM_RSTSTS
SIM_MSH_ID
SIM_POWER
TMRn_CMP1
TMRn_CMP2
TMRn_LOAD
TMRn_HOLD
TMRn_CNTR
SIM_SCR0-3
SIM_LSH_ID
TMRn_CTRL
SPI_SPDRR
SPI_SPSCR
SPI_SPDSR
SPI_SPDTR
TMRn_CAP
TMRn_SCR
SIM_ISALH
SIM_ISALL
SIM_GPS
SIM_PCE
Electrical Design Considerations
TMRn_COMSCR
TMRn_CMPLD1
TMRn_CMPLD2
SIM_CONTROL
SIM_CLKOSR
SIM_RSTSTS
SIM_MSH_ID
TMRn_CMP1
TMRn_CMP2
TMRn_HOLD
TMRn_CNTR
TMRn_LOAD
TMRn_CTRL
SIM_SCR0-3
SIM_LSH_ID
TMRn_SCR
TMRn_CAP
SIM_ISALH
SIM_ISALL
Processor
SIM_GPS
SIM_PCE
Acronym
SPI_SCR
SPI_DSR
SPI_DRR
SPI_DTR
Expert
n = 0, 1, 2, 3
Memory Address
0xF142
Start
0xF14A
0xF14B
0xF14C
0xF14D
0xF14E
0xF0C0
0xF0C1
0xF0C2
0xF0C3
0xF0nA
0xF140
0xF141
0xF146
0xF147
0xF148
0xF0n0
0xF0n1
0xF0n2
0xF0n3
0xF0n4
0xF0n5
0xF0n6
0xF0n7
0xF0n8
0xF0n9
121
0xF145
End