mc56f801 Freescale Semiconductor, Inc, mc56f801 Datasheet - Page 74
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mc56f801
Manufacturer Part Number
mc56f801
Description
16-bit Digital Signal Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC56F801.pdf
(125 pages)
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6.3.9.6
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
6.3.9.7
Each bit controls clocks to the indicated peripheral.
6.3.9.8
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
6.3.9.9
Each bit controls clocks to the indicated peripheral.
6.3.9.10
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
6.3.9.11
Each bit controls clocks to the indicated peripheral.
6.3.10
The I/O Short Address Location registers are used to specify the memory referenced via the I/O short
address mode. The I/O short address mode allows the instruction to specify the lower six bits of address;
the upper address bits are not directly controllable. This register set allows limited control of the full
address, as shown in
74
•
•
•
•
•
•
0 = The clock is not provided to the peripheral (the peripheral is disabled)
1 = Clocks are enabled
0 = The clock is not provided to the peripheral (the peripheral is disabled)
1 = Clocks are enabled
0 = The clock is not provided to the peripheral (the peripheral is disabled)
1 = Clocks are enabled
I/O Short Address Location Register (SIM_IOSAHI and
SIM_IOSALO)
Reserved—Bit 5
SCI IPBus Clock Enable (SCI)—Bit 4
Reserved—Bit 3
SPI IPBus Clock Enable (SPI)—Bit 2
Reserved—Bit 1
PWM IPBus Clock Enable (PWM)—Bit 0
Figure
6-12.
56F8014 Technical Data, Rev. 9
Freescale Semiconductor
Preliminary