r5f21346mnfp Renesas Electronics Corporation., r5f21346mnfp Datasheet - Page 203

• Manufacturer Part Number: r5f21346mnfp
• Description: Single-chip Mcus Incorporates The R8c Cpu Core
• Manufacturer: Renesas Electronics Corporation.

R8C/34M Group
R01UH0131EJ0100 Rev.1.00
Jun 21, 2011
11.8.5
(a) The contents of the interrupt control register can be rewritten only while no interrupt requests
(b) When rewriting the contents of the interrupt control register after disabling the interrupt, be careful to
(c) When using the I flag to disable an interrupt, set the I flag as shown in the sample programs below. Refer to
Examples 1 to 3 shows how to prevent the I flag from being set to 1 (interrupts enabled) before the contents of
the interrupt control register are rewritten for the effects of the internal bus and the instruction queue buffer.
Example 1:
Example 2:
Example 3:
INT_SWITCH1:
INT_SWITCH2:
INT_SWITCH3:
corresponding to that register are generated. If an interrupt request may be generated, disable the interrupt
before rewriting the contents of the interrupt control register.
choose appropriate instructions.
Changing any bit other than the IR bit
If an interrupt request corresponding to the register is generated while executing the instruction, the IR bit
may not be set to 1 (interrupt requested), and the interrupt may be ignored. If this causes a problem, use one
of the following instructions to rewrite the contents of the register: AND, OR, BCLR, and BSET.
Changing the IR bit
Depending on the instruction used, the IR bit may not be set to 0 (no interrupt requested).
Use the MOV instruction to set the IR bit to 0.
(b) regarding rewriting the contents of interrupt control registers using the sample programs.
Rewriting Interrupt Control Register
FCLR
AND.B
NOP
NOP
FSET
FCLR
AND.B
MOV.W MEM,R0
FSET
PUSHC FLG
FCLR
AND.B
POPC
Use the NOP instructions to pause program until the interrupt control register is rewritten
Use a dummy read to delay the FSET instruction
Use the POPC instruction to change the I flag
I
I
I
#00H,0056H
I
#00H,0056H
I
#00H,0056H
FLG
; Disable interrupts
; Set the TRAIC register to 00h
;
; Enable interrupts
; Disable interrupts
; Set the TRAIC register to 00h
; Dummy read
; Enable interrupts
; Disable interrupts
; Set the TRAIC register to 00h
; Enable interrupts
Page 171 of 740
11. Interrupts