cop87l88gw National Semiconductor Corporation, cop87l88gw Datasheet - Page 12

• Manufacturer Part Number: cop87l88gw
• Description: One-time Programmable Otp Microcontroller
• Manufacturer: National Semiconductor Corporation

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TxC3
Timers
TIMER CONTROL FLAGS
The timers T1 and T2 have identical control structures The
control bits and their functions are summarized below
TxC0
TxPNDA Timer Interrupt Pending Flag
TxPNDB Timer Interrupt Pending Flag
TxENA
TxENB
TxC3
TxC2
TxC1
The timer mode control bits (TxC3 TxC2 and TxC1) are detailed below
0
0
1
1
0
1
0
1
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TxC2
0
0
0
0
1
1
1
1
Timer Start Stop control in Modes 1 and 2 (Proc-
essor Independent PWM and External Event
Counter) where 1
derfIow Interrupt Pending Flag in Mode 3 (Input
Capture)
Timer Interrupt Enable Flag
Timer Interrupt Enable Flag
1
0
Timer Mode Control
Timer Mode Control
Timer Mode Control
e
e
(Continued)
Timer Interrupt Enabled
Timer Interrupt Disabled
TxC1
0
1
1
0
0
0
1
1
MODE 2 (External Event Counter)
MODE 2 (External Event Counter)
MODE 1 (PWM) TxA Toggle
MODE 1 (PWM) No TxA Toggle
MODE 3 (Capture) Captures
TxA Positive Edge
TxB Positive Edge
MODE 3 (Capture) Captures
TxA Positive Edge
TxB Negative Edge
MODE 3 (Capture) Captures
TxA Negative Edge
TxB Positive Edge
MODE 3 (Capture) Captures
TxA Negative Edge
TxB Negative Edge
e
Start 0
Timer Mode
e
Stop Timer Un-
TABLE II Timer Mode Control
Timer Underflow
Timer Underflow
Autoreload RA
Autoreload RA
Positive TxA Edge or
Timer Underflow
Positive TxA Edge or
Timer Underflow
Negative TxB Edge or
Timer Underflow
Negative TxA Edge or
Timer Underflow
12
Interrupt A
Figure 11 shows the capture timer 1 block diagram
Capture Timer
This device contains two independent capture timers Cap-
ture Timer 1 and Capture Timer 2 Each capture timer con-
tains an 8-bit programmable prescaler register a 16-bit
down counter a 16-bit input capture register and capture
edge select logic The 16-bit down counter is clocked at a
specific frequency determined by the value loaded into the
prescaler register A selected positive or negative edge
transition on the capture input causes the contents of the
down counter to be latched into the capture register The
values captured in the registers reflect the elapsed time be-
tween two positive or two negative transitions on the cap-
ture input The time between a positive and negative edge
(a pulse width) may be measured if the selected capture
edge is switched after the first edge is captured Each cap-
ture timer may be stopped started under software control
and each capture timer may be configured to interrupt the
microcontroller on an underflow or input capture
Source
Positive TxB Edge
Positive TxB Edge
Autoreload RB
Autoreload RB
Positive TxB Edge
Negative TxB Edge
Positive TxB Edge
Negative TxB Edge
Interrupt B
Source
TxA Positive Edge
TxA Negative Edge
t
t
t
t
t
t
c
c
c
c
c
c
Counts On
Timer