cop87l88gw National Semiconductor Corporation, cop87l88gw Datasheet - Page 13

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cop87l88gw

Manufacturer Part Number
cop87l88gw
Description
One-time Programmable Otp Microcontroller
Manufacturer
National Semiconductor Corporation
Datasheet
Timers
The registers shown in the block diagram include those for
Capture Timer 1 (CM1) as well as the capture timer 1 con-
trol register These registers are read writable (with the ex-
ception of the capture registers which are read-only) and
may be accessed through the data memory address data
bus The registers are designated as
CM1PSC Capture Timer 1 Prescaler (8-bit)
CM1CRL Capture Timer 1 Capture Register (Low-byte)
CM1CRH Capture Timer 1 Capture Register (High-byte)
CM2PSC Capture Timer 2 Prescaler (8-bit)
CM2CRL Capture Timer 2 Capture Register (Low-byte)
CM2CRH Capture Timer 2 Capture Register (High-byte)
CCMR1
CCMR2
read-only
read-only
read-only
read-only
Control Register for Capture Timer 1
Control Register for Capture Timer 2
(Continued)
FIGURE 11 Capture Timer 1 Block Diagram
13
CONTROL REGISTER BITS
The control bits for Capture Timer 1 (CM1) and Capture
Timer 2 (CM2) are contained in CCMR1 and CCMR2
The CCMR1 Register Bits are
CM1RUN CM1 start stop control bit (1
CM1IEN
CM1IP1
CM1IP2
CM1EC
CM1TM
All interrupt pending bits must be reset by software
CM1
Bit 7
TM
used
un-
CM1 interrupt enable control bit (1
IRQ)
CM1 interrupt pending bit 1 (1
flowed)
CM1 interrupt pending bit 2 (1
Select the active edge for capture on CM1 (0
rising 1
CM1 test mode control bit (1
in test mode This bit is reserved during normal
operation and must never be set to one )
used
un-
e
falling)
CM1
EC
CM1
IP2
CM1
IP1
e
e
e
http
special test path
start 0
e
CM1 captured)
TL DD 12527 – 11
CM1
IEN
CM1 under-
www national com
e
e
enable
RUN
CM1
Bit 0
stop)
e

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