cop87l88gw National Semiconductor Corporation, cop87l88gw Datasheet - Page 36

• Manufacturer Part Number: cop87l88gw
• Description: One-time Programmable Otp Microcontroller
• Manufacturer: National Semiconductor Corporation

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INSTRUCTION SET
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ADD
ADC
SUBC
AND
ANDSZ
OR
XOR
IFEQ
IFEQ
IFNE
IFGT
lFBNE
DRSZ
SBIT
RBIT
lFBIT
RPND
X
X
LD
LD
LD
LD
LD
X
X
LD
LD
LD
CLR
INC
DEC
LAID
DCOR
RRC
RLC
SWAP
SC
RC
IFC
IFNC
POP
PUSH
VIS
JMPL
JMP
JP
JSRL
JSR
JID
RET
RETSK
RETI
INTR
NOP
A MemI
A Meml
A Meml
A Meml
A lmm
A Meml
A Meml
MD lmm
A Meml
A Meml
A Meml
Reg
A Mem
A X
A Meml
A X
B Imm
Mem Imm
Reg Imm
A B
A X
A B
A X
A
A
A
A
A
A
A
A
A
Addr
Addr
Disp
Addr
Addr
B
g
Mem
Mem
Mem
g
g
g
g
lmm
ADD
ADD with Carry
Subtract with Carry
Logical AND
Logical AND lmmed Skip if Zero
Logical OR
Logical EXclusive OR
IF EQual
IF EQual
IF Not Equal
IF Greater Than
IF B Not Equal
Decrement Reg Skip if Zero
Set BIT
Reset BIT
IF BIT
Reset PeNDing Flag
EXchange A with Memory
EXchange A with Memory X
LoaD A with Memory
LoaD A with Memory X
LoaD B with Immed
LoaD Memory Immed
LoaD Register Memory Immed
EXchange A with Memory B
EXchange A with Memory X
LoaD A with Memory B
LoaD A with Memory X
LoaD Memory B lmmed
CLeaR A
INCrement A
DECrement A
Load A InDirect from ROM
Decimal CORrect A
Rotate A Right thru C
Rotate A Left thru C
SWAP nibbles of A
Set C
Reset C
IF C
IF Not C
POP the stack into A
PUSH A onto the stack
Vector to Interrupt Service Routine
Jump absolute Long
Jump absolute
Jump relative short
Jump SubRoutine Long
Jump SubRoutine
Jump InDirect
RETurn from subroutine
RETurn and SKip
RETurn from Interrupt
Generate an Interrupt
No OPeration
36
A
A
Compare A and Meml Do next if A
A
A
C
If C is true do next instruction
PC9
PL
A
A
A
Skip next if (A and Imm)
A
Compare MD and lmm Do next if MD
Compare A and Meml Do next if A
Compare A and Meml Do next if A
Do next if lower 4 bits of B
Reg
1 to bit Mem (bit
0 to bit Mem
If bit
Reset Software Interrupt Pending Flag
A
A
B
Mem
Reg
A
A
A
A
A
A
A
A
A
C
C
A7
C
If C is not true do next instruction
SP
PU
PC
PC
SP
SP
SP
PC
B
SP
SP
SP
SP
a
a
a
A
A
A
A and MemI
A or MemI
A xor MemI
MemI
Imm
0
A
A
ROM (PU A)
BCD correction of A (follows ADC SUBC)
A7
A7
1 HC
0 HC
2 PL
2 PL
2 PL
X
B (B
X (X
A4
ROM (PU A)
SP
Mem
ii (ii
PC
PC
Imm (B
A or Mem is true do next instruction
a
a
b
a
b
X
B (B
X (X
VU PL
0
Reg
Imm
A SP
PL SP
PL SP
PL SP
Imm
MemI
1
MemI
MemI
1
a
a
a
e
b
1 A
i (i
r (r is
1
15 bits 0 to 32k)
A3
1 Skip if Reg
1
0
X
SP PU
SP PU
SP PU
B
e
a
a
e
b
b
b
X
B
g
SP
g
b
B
12 bits)
C C
1
1
1
C C
0 to 7 immediate)
g
g
1)
A0
31 to
1)
g
A0
A0
VL
b
SP
1)
1)
e
1)
1
PU SP
i
0
a
PU SP
PU SP
Carry HC
Carry HC
C
Imm
C
32 except 1)
e
SP
SP
SP
0
b
b
b
b
e
l
i
b
b
1 skip next instruction
2 PC
1
1 GIE
Meml
e
Meml
Meml
2 PC9
2 PC
lmm
Half Carry
Half Carry
ii
0FF
0
1
i