m37702s1afp Mitsumi Electronics, Corp., m37702s1afp Datasheet - Page 12

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m37702s1afp

Manufacturer Part Number
m37702s1afp
Description
Single-chip 16-bit Cmos Microcomputer
Manufacturer
Mitsumi Electronics, Corp.
Datasheet

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INTERRUPTS
Table 1 shows the interrupt types and the corresponding interrupt
vector addresses. Reset is also treated as a type of interrupt and
is discussed in this section, too. DBC is an interrupt used during
debugging.
Interrupts other than reset, DBC, watchdog timer, zero divide, and
BRK instruction all have interrupt control registers. Table 2 shows
the addresses of the interrupt control registers and Figure 6 shows
the bit configuration of the interrupt control register.
Use the SEB and CLB instructions when setting each interrupt
control register.
The interrupt request bit is automatically cleared by the hardware
during reset or when processing an interrupt.
Also, interrupt request bits other than DBC and watchdog timer
can be cleared by software.
____
INT
rupt at the input level (level sense) or at the edge (edge sense)
can be selected with the level sense/edge sense selection bit. Fur-
thermore, the polarity of the interrupt input can be selected with
polarity selection bit.
Timer and UART interrupts are described in the respective sec-
tion. The priority of interrupts when multiple interrupts are caused
simultaneously is partially fixed by hardware, but, it can also be
adjusted by software as shown in Figure 7. The hardware priority
is fixed the following:
reset > DBC > watchdog timer > other interrupts
Fig. 6 Interrupt control register configuration
12
2
to INT
____
____
0
are external interrupts and whether to cause an inter-
Interrupt control register configuration for A-D converter, UART0, UART1, timer A0 to timer A4, and
timer B0 to timer B2
Interrupt control register configuration for
7
7
6 5 4 3 2 1 0
6 5 4 3 2 1 0
____
____
____
Interrupt priority
Interrupt request bit
Interrupt priority
Interrupt request bit
Polarity selection bit
Level sense/edge sense selection bit
0 : No interrupt
1 : Interrupt
0 : No interrupt
1 : Interrupt
0 : Set interrupt request bit at “H” level for level sense and when changing
1 : Set interrupt request bit at “L” level for level sense and when changing
0 : Edge sense
1 : Level sense
from “H” to “L” level for edge sense.
from “L” to “H” level for edge sense.
M37702M2AXXXFP, M37702M2BXXXFP
INT
2
to
INT
0.
Table 1. Interrupt types and the interrupt vector addresses
A-D conversion
UART1 transmit
UART1 receive
UART0 transmit
UART0 receive
Timer B2
Timer B1
Timer B0
Timer A4
Timer A3
Timer A2
Timer A1
Timer A0
INT
INT
INT
Watchdog timer
____
DBC (unusable)
Break instruction
Zero divide
Reset
____
____
____
M37702S1AFP, M37702S1BFP
2
1
0
external interrupt
external interrupt
external interrupt
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Interrupts
MITSUBISHI MICROCOMPUTERS
00FFD6
00FFD8
00FFDA
00FFDC
00FFDE
00FFE0
00FFE2
00FFE4
00FFE6
00FFE8
00FFEA
00FFEC
00FFEE
00FFF0
00FFF2
00FFF4
00FFF6
00FFF8
00FFFA
00FFFC
00FFFE
Vector addresses
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
00FFD7
00FFD9
00FFDB
00FFDD
00FFDF
00FFE1
00FFE3
00FFE5
00FFE7
00FFE9
00FFEB
00FFED
00FFEF
00FFF1
00FFF3
00FFF5
00FFF7
00FFF9
00FFFB
00FFFD
00FFFF
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16

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