m37702s1afp Mitsumi Electronics, Corp., m37702s1afp Datasheet - Page 27

• Manufacturer Part Number: m37702s1afp
• Description: Single-chip 16-bit Cmos Microcomputer
• Manufacturer: Mitsumi Electronics, Corp.

SERIAL I/O PORTS
Two independent serial I/O ports are provided. Figure 33 shows a
block diagram of the serial I/O ports.
Bits 0, 1, and 2 of the UARTi (i = 0, 1) Transmit/Receive mode reg-
ister shown in Figure 34 are used to determine whether to use port
P8 as parallel port, clock synchronous serial I/O port, or asynchro-
Fig. 33 Serial I/O port block diagram
Fig. 34 UART i Transmit/ Receive mode register bit
7 6 5 4 3 2 1 0
CTSi/RTSi
CLKi
configuration
RxDi
Clock source selection
f
f
f
f
2
16
64
512
External
Serial communication method selection bits
0 0 0 : Parallel port
0 0 1 : Clock synchronous
1 0 0 : 7-bit UART
1 0 1 : 8-bit UART
1 1 0 : 9-bit UART
Internal clock/External clock selection bit
Stop bit length selection bit
Even/Odd parity selection bit
Parity enable selection bit
Sleep selection bit
UART 0 transmit/receive mode register 30
UART 1 transmit/receive mode register 38
0 : Internal clock
1 : External clock
0 : 1 stop bit
1 : 2 stop bits
0 : Odd parity
1 : Even parity
0 : No parity
1 : With parity
0 : No sleep
1 : Sleep
Bit rate
generator
UART0(31
UART1(39
Internal
Clock synchronous
16
16
1/(n + 1)
Divider
)
)
(Internal clock)
1/16 Divider
1/16 Divider
1/2 Divider
Addresses
M37702M2AXXXFP, M37702M2BXXXFP
16
16
Clock synchronous
Clock synchronous
Clock synchronous
UART receive
UART transmission
(Internal clock)
Clock synchronous
(External clock)
nous (UART) serial I/O port using start and stop bits.
Figures 35 and 36 show the connections of receiver/transmitter
according to the mode.
Figure 37 shows the bit configuration of the UARTi transmit/re-
ceive control register.
Each communication method is described below.
0
M37702S1AFP, M37702S1BFP
0
0
Receive control
Transmission
control circuit
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
0
circuit
0
0
Data bus (even)
Data bus (odd)
0
Receive clock
Transmission clock
D
D
MITSUBISHI MICROCOMPUTERS
8
8
Data bus (even)
Data bus (odd)
D
D
Transmission register
7
7
D
D
Receive register
6
6
D
D
5
5
D
D
4
4
D
UART0 (37
UART1 (3F
D
3
3
UART0 (33
UART1 (3B
D
D
2
2
D
D
1
1
D
D
16
16
0
0
, 36
, 3E
16
16
Receive
buffer register
Transmission
buffer register
, 32
, 3A
TxDi
16
16
)
)
16
16
)
)
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