m37702s1afp Mitsumi Electronics, Corp., m37702s1afp Datasheet - Page 34
![no-image](/images/manufacturer_photos/0/4/452/mitsumi_electronics__corp__sml.jpg)
m37702s1afp
Manufacturer Part Number
m37702s1afp
Description
Single-chip 16-bit Cmos Microcomputer
Manufacturer
Mitsumi Electronics, Corp.
Datasheet
1.M37702S1AFP.pdf
(59 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
M37702S1AFP
Manufacturer:
MITSUBISHI
Quantity:
5 510
A-D CONVERTER
The A-D converter is an 8-bit successive approximation converter.
Figure 43 shows a block diagram of the A-D converter and Figure
44 shows the bit configuration of the A-D control register. The fre-
quency of the A-D converter operating clock
bit 7 of the A-D control register. When bit 7 is “0”,
frequency divided by 8. That is,
the comparator consists of a capacity coupling amplifier.
The operating mode is selected by the bits 3 and 4 of A-D control
register. The available operating modes are one-shot, repeat,
single sweep, and repeat sweep.
The bit of data direction register bit corresponding to the A-D con-
verter pin must be “0” (input mode) because the analog input port
is shared with port P7.
The operation of each mode is described below.
Fig 43 A-D converter block diagram
34
AD
AD
is the clock frequency divided by 4 and
during A-D conversion must be 250 kHz minimum because
Successive approximation register
f(X
V
AV
REF
IN
SS
)
AD
AD
AN
AN
AN
AN
AN
AN
AN
AN
TRG
= f(X
0
1
2
3
4
5
6
7
IN
1/2
)/8. When bit 7 is “1”,
A-D register 0 (20
A-D register 1 (22
A-D register 2 (24
A-D register 3 (26
A-D register 4 (28
A-D register 5 (2A
A-D register 6 (2C
A-D register 7 (2E
AD
AD
Data bus (even)
Ladder network
is selected by the
is = f(X
AD
f
2
is the clock
Addresses
M37702M2AXXXFP, M37702M2BXXXFP
IN
)/4. The
1/2
16
16
16
16
16
16
16
16
)
)
)
)
)
)
)
)
A-D conversion speed selection
A-D control register
Selector
Fig 44 A-D control register bit configuration
Vref
M37702S1AFP, M37702S1BFP
1/2
7
(1E
6
16
)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
5
4
Decoder
3
2
MITSUBISHI MICROCOMPUTERS
AD
1
0
A-D control register 1
Trigger selection bit
Analog input selection bits
0 0 0 : Select AN
0 0 1 : Select AN
0 1 0 : Select AN
0 1 1 : Select AN
1 0 0 : Select AN
1 0 1 : Select AN
1 1 0 : Select AN
1 1 1 : Select AN
Comparator
A-D conversion start flag
Frequency selection flag
A-D operation mode selection bits
0 0 : One-shot mode
0 1 : Repeat mode
1 0 : Single sweep mode
1 1 : Repeat sweep mode
0 : Software trigger
1 :
0 : Stop A-D conversion
1 : Start A-D conversion
0 : Select f(X
1 : Select f(X
AD
TRG
input trigger
0
1
2
3
4
5
6
7
IN
IN
)/8
)/4
Address
1E
16