ata5773 ATMEL Corporation, ata5773 Datasheet - Page 173

• Manufacturer Part Number: ata5773
• Description: Microcontroller With Uhf Ask/fsk Transmitter
• Manufacturer: ATMEL Corporation

14.3.4
8006G–AVR–01/08
Two-wire Mode
The code is size optimized using only eight instructions (plus return). The code example
assumes that the DO and USCK pins have been enabled as outputs in DDRA. The value stored
in register r16 prior to the function is called is transferred to the master device, and when the
transfer is completed the data received from the master is stored back into the register r16.
Note that the first two instructions is for initialization, only, and need only be executed once.
These instructions set three-wire mode and positive edge clock. The loop is repeated until the
USI Counter Overflow Flag is set.
The USI two-wire mode is compliant to the Inter IC (TWI) bus protocol, but without slew rate lim-
iting on outputs and without input noise filtering. Pin names used in this mode are SCL and SDA.
Figure 14-4. Two-wire Mode Operation, Simplified Diagram
...
SlaveSPITransfer:
SlaveSPITransfer_loop:
out
ldi
out
in
sbrs
rjmp
in
ret
SLAVE
MASTER
Bit7
Bit7
USIDR,r16
r16,(1<<USIOIF)
USISR,r16
r16, USISR
r16, USIOIF
SlaveSPITransfer_loop
r16,USIDR
Bit6
Bit6
Bit5
Bit5
Bit4
Bit4
Bit3
Bit3
Bit2
Bit2
Bit1
Bit1
Bit0
Bit0
Two-wire Clock
Control Unit
PORTxn
HOLD
ATtiny24/44/84
SCL
SDA
SCL
SDA
SCL
VCC
121