ata5773 ATMEL Corporation, ata5773 Datasheet - Page 54

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ata5773

Manufacturer Part Number
ata5773
Description
Microcontroller With Uhf Ask/fsk Transmitter
Manufacturer
ATMEL Corporation
Datasheet

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1. Pin Configurations
Figure 1-1.
1.1
1.1.1
1.1.2
1.1.3
2
(PCINT6/OC1A/SDA/MOSI/DI/ADC6) PA6
(ADC4/USCK/SCL/T1/PCINT4) PA4
Pin Descriptions
ATtiny24/44/84
VCC
GND
Port B (PB3...PB0)
(PCINT10/INT0/OC0A/CKOUT) PB2
NOTE
Bottom pad should be
soldered to ground.
DNC: Do Not Connect
Pinout ATtiny24/44/84
(ADC0/AREF/PCINT0) PA0
(PCINT7/ICP/OC0B/ADC7) PA7
(ADC2/AIN1/PCINT2) PA2
(ADC1/AIN0/PCINT1) PA1
(ADC3/T0/PCINT3) PA3
(PCINT11/RESET/dW) PB3
(PCINT8/XTAL1/CLKI) PB0
(PCINT9/XTAL2) PB1
Supply voltage.
Ground.
Port B is a 4-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port B output buffers have symmetrical drive characteristics with both high sink and source
capability except PB3 which has the RESET capability. To use pin PB3 as an I/O pin, instead of
RESET pin, program (‘0’) RSTDISBL fuse. As inputs, Port B pins that are externally pulled low
will source current if the pull-up resistors are activated. The Port B pins are tri-stated when a
reset condition becomes active, even if the clock is not running.
VCC
1
2
3
4
5
PDIP/SOIC
QFN/MLF
1
2
3
4
5
6
7
14
13
12
11
10
9
8
15
14
13
12
11
GND
PA0 (ADC0/AREF/PCINT0)
PA1 (ADC1/AIN0/PCINT1)
PA2 (ADC2/AIN1/PCINT2)
PA3 (ADC3/T0/PCINT3)
PA4 (ADC4/USCK/SCL/T1/PCINT4)
PA5 (ADC5/DO/MISO/OC1B/PCINT5)
Pin 16: PA6 (PCINT6/OC1A/SDA/MOSI/DI/ADC6)
Pin 20: PA5 (ADC5/DO/MISO/OC1B/PCINT5)
PA7 (PCINT7/ICP/OC0B/ADC7)
PB2 (PCINT10/INT0/OC0A/CKOUT)
PB3 (PCINT11/RESET/dW)
PB1 (PCINT9/XTAL2)
PB0 (PCINT8/XTAL1/CLKI)
8006G–AVR–01/08

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