xr16m654 Exar Corporation, xr16m654 Datasheet - Page 27

• Manufacturer Part Number: xr16m654
• Description: 1.62v To 3.63v Quad Uart With 64-byte Fifo
• Manufacturer: Exar Corporation

REV. 1.0.0
A
A2-A0
DDRESS
0 1 0
0 0 0
0 0 0
0 0 1
0 1 0
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
0 0 0
0 0 1
T
ABLE
N
MCR
RHR
MSR
DLM
THR
FCR
LCR
SPR
DLD
R
LSR
DLL
IER
ISR
AME
EG
10: INTERNAL REGISTERS DESCRIPTION.
RD/WR
RD/WR Divisor
RD/WR
RD/WR
RD/WR
RD/WR
RD/WR
W
R
WR
WR
RD
RD
RD
RD
EAD
RITE
/
RX FIFO
RX FIFO
Enabled
Enable
Trigger
Enable
Global
FIFOs
CTS#
B
Pres-
Rsvd
BRG
caler
Error
Input
Bit-7
Bit-7
CD#
Bit-7
Bit-7
Bit-7
Int.
IT
0/
0/
-7
RX FIFO
IR Mode
Enabled
ENable
Enable
Trigger
Set TX
THR &
FIFOs
Empty
Break
RTS#
B
Input
Rsvd
Bit-6
Bit-6
Bit-6
Bit-6
Bit-6
TSR
RI#
Int.
IT
0/
0/
-6
16C550 Compatible Registers
Baud Rate Generator Divisor
4X Mode 8X Mode
TX FIFO
XonAny
Xoff Int.
Enable
Source
Trigger
Empty
DSR#
Parity
B
Input
Bit-5
Bit-5
Bit-5
THR
Bit-5
Bit-5
Bit-5
INT
Set
IT
0/
0/
0/
0/
-5
27
RX Break RX Fram-
TX FIFO
Lopback
Internal
Enable
Source
Trigger
Enable
Sleep
Parity
CTS#
Mode
B
Even
1.62V TO 3.63V QUAD UART WITH 64-BYTE FIFO
Input
Bit-4
Bit-4
Bit-4
Bit-4
Bit-4
Bit-4
INT
IT
0/
0/
0/
-4
S
HADED BITS ARE ENABLED WHEN
INT Out-
ing Error
Stat. Int.
Modem
(OP2#)
Enable
Source
Enable
Enable
Enable
Parity
Mode
B
Delta
DMA
Bit-3
Bit-3
Bit-3
CD#
Bit-3
Bit-3
Bit-3
Bit-3
INT
put
IT
-3
RX Line
Source
(OP1#)
Enable
Reset
Parity
B
Delta
FIFO
Rsvd
Error
Bit-2
Bit-2
Bit-2
Bit-2
Bit-2
Bit-2
Bit-2
Stat.
Stop
Bits
INT
RI#
Int.
RX
TX
IT
-2
Source
Control
Enable
Length
Output
Empty
DSR#
Reset
RTS#
Over-
Word
B
FIFO
Error
Delta
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
INT
RX
RX
run
TX
Int
IT
-1
XR16M654/654D
EFR B
Control
Enable
Source
Enable
Length
Output
Ready
FIFOs
DTR#
CTS#
Word
B
Delta
Bit-0
Bit-0
Data
Bit-0
Bit-0
Data
Bit-0
Bit-0
Bit-0
Bit-0
INT
RX
Int.
RX
IT
-0
IT
-4=1
LCR≠0xBF
LCR≠0xBF
LCR[7] = 0
LCR[7] = 0
LCR[7] = 1
EFR[4] = 1
C
LCR[7]=1
OMMENT