xr16v2752il Exar Corporation, xr16v2752il Datasheet - Page 28
xr16v2752il
Manufacturer Part Number
xr16v2752il
Description
High Performance Duart With 64-byte Fifo
Manufacturer
Exar Corporation
Datasheet
1.XR16V2752IL.pdf
(51 pages)
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XR16V2752
HIGH PERFORMANCE DUART WITH 64-BYTE FIFO
The Line Control Register is used to specify the asynchronous data communication format. The word or
character length, the number of stop bits, and the parity are selected by writing the appropriate bits in this
register.
LCR[1:0]: TX and RX Word Length Select
These two bits specify the word length to be transmitted or received.
4.6
T
Table-A
Table-B
Table-C
Table-D
T
RIGGER
ABLE
Line Control Register (LCR) - Read/Write
FCTR
B
IT
0
0
1
1
-5
T
ABLE
FCTR
B
IT
0
1
0
1
10: T
-4
RANSMIT AND
B
FCR
IT
0
0
1
1
0
0
1
1
0
0
1
1
X
-7
BIT-1
0
0
1
1
B
FCR
IT
X
0
1
0
1
0
1
0
1
0
1
0
1
-6
R
ECEIVE
B
FCR
BIT-0
IT
X
0
0
0
1
1
0
0
1
1
0
1
0
1
-5
FIFO T
BIT
FCR
28
X
0
0
1
0
1
0
1
0
1
-4
RIGGER
T
Programmable
FCTR[7] = 0.
RIGGER
W
1 (default)
R
via TRG
register.
ORD LENGTH
5 (default)
ECEIVE
T
14
16
24
28
16
56
60
ABLE AND
4
8
8
8
6
7
8
L
EVEL
Programmable
FCTR[7] = 1.
L
1 (default)
T
EVEL
T
register.
via TRG
RANSMIT
RIGGER
L
EVEL
16
24
30
16
32
56
8
8
S
ELECTION
16C550, 16C2550,
16C2552, 16C554,
16C580
16C650A
16C654
16L2752, 16C2850,
16C2852, 16C850,
16C854, 16C864
C
OMPATIBILITY
REV. 1.0.2
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