xr16c2550ip Exar Corporation, xr16c2550ip Datasheet - Page 24

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xr16c2550ip

Manufacturer Part Number
xr16c2550ip
Description
Dual Uart With 16-byte Transmit And Receive Fifos
Manufacturer
Exar Corporation
Datasheet
XR16C2550
2.97V TO 5.5V DUART WITH 16-BYTE FIFO
MSR[7]: CD Input Status
Normally this bit is the compliment of the CD# input. In the loopback mode this bit is equivalent to bit-3 in the
MCR register. The CD# input may be used as a general purpose input when the modem interface is not used.
This is a 8-bit general purpose register for the user to store temporary data. The content of this register is
preserved during sleep mode but becomes 0xFF (default) after a reset or a power off-on cycle.
The Baud Rate Generator (BRG) is a 16-bit counter that generates the data rate for the transmitter. The rate is
programmed through registers DLL and DLM which are only accessible when LCR bit-7 is set to ‘1’.
“Programmable Baud Rate Generator” on page 9.
4.10
4.11
Scratch Pad Register (SPR) - Read/Write
Baud Rate Generator Registers (DLL and DLM) - Read/Write
T
I/O SIGNALS
ABLE
REGISTERS
RXRDY#
TXRDY#
OP2#
RTS#
DTR#
MCR
RHR
MSR
DLM
THR
FCR
SPR
LCR
LSR
DLL
IER
ISR
INT
TX
11: UART RESET CONDITIONS FOR CHANNEL A AND B
Bits 7-0 = 0xXX
Bits 7-0 = 0xXX
Bits 7-0 = 0xXX
Bits 7-0 = 0xXX
Bits 7-0 = 0x00
Bits 7-0 = 0x00
Bits 7-0 = 0x01
Bits 7-0 = 0x00
Bits 7-0 = 0x00
Bits 7-0 = 0x60
Bits 3-0 = Logic 0
Bits 7-4 = Logic levels of the inputs inverted
Bits 7-0 = 0xFF
Logic 1
Logic 1
Logic 1
Logic 1
Logic 1
Logic 0
Three-State Condition
24
RESET STATE
RESET STATE
xr
REV. 1.0.1
See

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