sc16c654 NXP Semiconductors, sc16c654 Datasheet - Page 27

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sc16c654

Manufacturer Part Number
sc16c654
Description
Quad Uart With 64-byte Fifo And Infrared Irda Encoder/decoder
Manufacturer
NXP Semiconductors
Datasheet

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Product data
7.6 Modem Control Register (MCR)
Table 16:
Table 17:
Table 18:
This register controls the interface with the modem or a peripheral device.
Table 19:
LCR[5]
X
0
0
1
1
LCR[2]
0
1
1
LCR[1]
0
0
1
1
Bit
7
6
Symbol
MCR[7]
MCR[6]
LCR[5] parity selection
LCR[2] stop bit length
LCR[1-0] word length
Modem Control Register bits description
LCR[4]
X
0
1
0
1
Word length
5, 6, 7, 8
5
6, 7, 8
LCR[0]
0
1
0
1
Quad UART with 64-byte FIFO and infrared (IrDA) encoder/decoder
Rev. 04 — 19 June 2003
Description
Clock select.
IR enable.
LCR[3]
0
1
1
1
1
Word length
5
6
7
8
Logic 0 = Divide-by-1. The input clock (crystal or external) is
divided by 16 and then presented to the Programmable Baud Rate
Generator (BGR) without further modification, i.e., divide-by-1.
(normal default condition).
Logic 1 = Divide-by-4. The divide-by-1 clock described in MCR[7] =
a logic 0, if further divided by four. Also see
“Programmable baud rate
Logic 0 = Enable the standard modem receive and transmit
input/output interface (normal default condition).
Logic 1 = Enable infrared IrDA receive and transmit inputs/outputs.
While in this mode, the TX/RX output/inputs are routed to the
infrared encoder/decoder. The data input and output levels will
conform to the IrDA infrared interface requirement. As such, while
in this mode, the infrared TX output will be a logic 0 during idle data
conditions.
Stop bit length (bit times)
1
1-
2
1
2
Parity selection
no parity
ODD parity
EVEN parity
force parity ‘1’
forced parity ‘0’
generator”.
SC16C654/654D
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Section 6.11
27 of 52

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