sc16c654 NXP Semiconductors, sc16c654 Datasheet - Page 28

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sc16c654

Manufacturer Part Number
sc16c654
Description
Quad Uart With 64-byte Fifo And Infrared Irda Encoder/decoder
Manufacturer
NXP Semiconductors
Datasheet

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Product data
Table 19:
Bit
5
4
3
2
1
0
Symbol
MCR[5]
MCR[4]
MCR[3]
MCR[2]
MCR[1]
MCR[0]
Modem Control Register bits description
Quad UART with 64-byte FIFO and infrared (IrDA) encoder/decoder
Rev. 04 — 19 June 2003
Description
Xon Any.
Loop-back. Enable the local loop-back mode (diagnostics). In this
mode the transmitter output (TX) and the receiver input (RX), CTS,
DSR, CD, and RI are disconnected from the SC16C654/654D I/O
pins. Internally the modem data and control pins are connected into a
loop-back data configuration (see
and transmitter interrupts remain fully operational. The Modem
Control Interrupts are also operational, but the interrupts’ sources are
switched to the lower four bits of the Modem Control. Interrupts
continue to be controlled by the IER register.
OP2, INTx enable. Used to control the modem CD signal in the
loop-back mode.
OP1. This bit is used in the Loop-back mode only. In the loop-back
mode, this bit is used to write the state of the modem RI interface
signal via OP1.
RTS
Automatic RTS may be used for hardware flow control by enabling
EFR[6]. See
DTR
Logic 0 = Disable Xon Any function (for 16C550 compatibility)
(normal default condition).
Logic 1 = Enable Xon Any function. In this mode, any RX character
received will enable Xon
Logic 0 = Disable loop-back mode (normal default condition).
Logic 1 = Enable local loop-back mode (diagnostics).
Logic 0 = Forces INTA-INTD outputs to the 3-State mode during
the 16 mode (normal default condition). In the loop-back mode,
sets OP2 (CD) internally to a logic 1.
Logic 1 = Forces the INTA-INTD outputs to the active mode during
the 16 mode. In the loop-back mode, sets OP2 (CD) internally to a
logic 0.
Logic 0 = Force RTS output to a logic 1 (normal default condition).
Logic 1 = Force RTS output to a logic 0.
Logic 0 = Force DTR output to a logic 1 (normal default condition).
Logic 1 = Force DTR output to a logic 0.
Table
22.
…continued
SC16C654/654D
Figure
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
8). In this mode, the receiver
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