sc16c754bibm NXP Semiconductors, sc16c754bibm Datasheet - Page 11

• Manufacturer Part Number: sc16c754bibm
• Description: 5 V, 3.3 V And 2.5 V Quad Uart, 5 Mbit/s Max. With 64-byte Fifos
• Manufacturer: NXP Semiconductors

Philips Semiconductors
9397 750 14668
Product data sheet
Fig 6. RTS functional timing
Fig 7. CTS functional timing
(1) N = receiver FIFO trigger level.
(2) The two blocks in dashed lines cover the case where an additional byte is sent, as described in
(1) When CTS is LOW, the transmitter keeps sending serial data out.
(2) When CTS goes HIGH before the middle of the last stop bit of the current byte, the transmitter finishes sending the current
(3) When CTS goes from HIGH to LOW, the transmitter begins sending data again.
byte, but it does not send the next byte.
RTS
IOR
RX
6.2.1 Auto-RTS
6.2.2 Auto-CTS
CTS
TX
Start
Auto-RTS data flow control originates in the receiver block (see
SC16C754B” on page
levels used in Auto-RTS are stored in the TCR. RTS is active if the RX FIFO level is below
the halt trigger level in TCR[3:0]. When the receiver FIFO halt trigger level is reached,
RTS is deasserted. The sending device (for example, another UART) may send an
additional byte after the trigger level is reached (assuming the sending UART has another
byte to send) because it may not recognize the deassertion of RTS until it has begun
sending the additional byte. RTS is automatically reasserted once the receiver FIFO
reaches the resume trigger level programmed via TCR[7:4]. This reassertion allows the
sending device to resume transmission.
The transmitter circuitry checks CTS before sending the next data byte. When CTS is
active, the transmitter sends the next byte. To stop the transmitter from sending the
following byte, CTS must be deasserted before the middle of the last stop bit that is
currently being sent. The auto-CTS function reduces interrupts to the host system. When
flow control is enabled, CTS level changes do not trigger host interrupts because the
device automatically controls its own transmitter. Without auto-CTS, the transmitter sends
any data present in the transmit FIFO and a receiver overrun error may result.
byte N
Start
Stop
byte 0 to 7
5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 64-byte FIFOs
3).
Rev. 02 — 13 June 2005
Start
Figure 6
Stop
byte N
1
shows RTS functional timing. The receiver FIFO trigger
1
2
Stop
Start
N
byte 0 to 7
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Section
Figure 1 “Block diagram of
SC16C754B
N+1
002aaa227
Stop
6.2.1.
002aaa226
Start
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