sc16c852sviet NXP Semiconductors, sc16c852sviet Datasheet - Page 48

• Manufacturer Part Number: sc16c852sviet
• Description: 1.8 V Dual Uart, 20 Mbit/s Max. With 128-byte Fifos, Infrared Irda , And Xscale Vlio Bus Interface
• Manufacturer: NXP Semiconductors

NXP Semiconductors
17. Contents
1
2
3
4
5
5.1
5.2
6
6.1
6.2
6.3
6.4
6.4.1
6.4.2
6.5
6.6
6.7
6.8
6.9
6.10
6.11
6.11.1
6.11.2
6.12
6.13
6.13.1
6.13.2
6.13.3
6.13.3.1
6.13.3.2
7
7.1
7.2
7.2.1
7.2.2
7.3
7.3.1
7.4
7.5
7.6
7.7
7.8
7.9
7.10
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pinning information . . . . . . . . . . . . . . . . . . . . . . 4
Functional description . . . . . . . . . . . . . . . . . . . 7
Register descriptions . . . . . . . . . . . . . . . . . . . 18
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
UART A-B functions . . . . . . . . . . . . . . . . . . . . . 7
Extended mode (128-byte FIFO) . . . . . . . . . . . 8
Internal registers. . . . . . . . . . . . . . . . . . . . . . . . 8
FIFO operation . . . . . . . . . . . . . . . . . . . . . . . . . 9
32-byte FIFO mode. . . . . . . . . . . . . . . . . . . . . . 9
128-byte FIFO mode. . . . . . . . . . . . . . . . . . . . . 9
Hardware flow control . . . . . . . . . . . . . . . . . . . . 9
Software flow control . . . . . . . . . . . . . . . . . . . 10
Special character detect . . . . . . . . . . . . . . . . . 11
Interrupt priority and time-out interrupts . . . . . 11
Programmable baud rate generator . . . . . . . . 12
Loopback mode . . . . . . . . . . . . . . . . . . . . . . . 14
Sleep mode. . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Conditions to enter Sleep mode . . . . . . . . . . . 16
Conditions to resume normal operation . . . . . 16
Low Power feature . . . . . . . . . . . . . . . . . . . . . 16
RS-485 features . . . . . . . . . . . . . . . . . . . . . . . 17
Auto RS-485 RTS control . . . . . . . . . . . . . . . . 17
RS-485 RTS inversion . . . . . . . . . . . . . . . . . . 17
Auto 9-bit mode (RS-485). . . . . . . . . . . . . . . . 17
Normal Multi-drop mode . . . . . . . . . . . . . . . . . 17
Auto address detection . . . . . . . . . . . . . . . . . . 18
Transmit (THR) and Receive (RHR) Holding
Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Interrupt Enable Register (IER) . . . . . . . . . . . 21
IER versus Transmit/Receive FIFO interrupt
mode operation. . . . . . . . . . . . . . . . . . . . . . . . 22
IER versus Receive/Transmit FIFO polled
mode operation. . . . . . . . . . . . . . . . . . . . . . . . 22
FIFO Control Register (FCR) . . . . . . . . . . . . . 23
FIFO mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Interrupt Status Register (ISR) . . . . . . . . . . . . 25
Line Control Register (LCR) . . . . . . . . . . . . . . 26
Modem Control Register (MCR) . . . . . . . . . . . 27
Line Status Register (LSR) . . . . . . . . . . . . . . . 28
Modem Status Register (MSR). . . . . . . . . . . . 29
Extra Feature Control Register (EFCR) . . . . . 30
Scratchpad Register (SPR) . . . . . . . . . . . . . . 30
Dual UART with 128-byte FIFOs, IrDA, and XScale VLIO bus interface
7.11
7.12
7.13
7.14
7.15
7.16
7.17
7.18
7.19
7.20
7.21
7.22
7.23
7.24
8
9
10
10.1
11
12
12.1
12.2
12.3
12.4
13
14
15
15.1
15.2
15.3
15.4
16
17
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2008.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [e-mail]
Limiting values . . . . . . . . . . . . . . . . . . . . . . . . 37
Static characteristics . . . . . . . . . . . . . . . . . . . 37
Dynamic characteristics . . . . . . . . . . . . . . . . . 38
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 43
Soldering of SMD packages . . . . . . . . . . . . . . 44
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . 46
Revision history . . . . . . . . . . . . . . . . . . . . . . . 46
Legal information . . . . . . . . . . . . . . . . . . . . . . 47
Contact information . . . . . . . . . . . . . . . . . . . . 47
Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Division Latch (DLL and DLM) . . . . . . . . . . . . 30
Transmit FIFO Level Count (TXLVLCNT) . . . . 30
Receive FIFO Level Count (RXLVLCNT) . . . . 30
Enhanced Feature Register (EFR). . . . . . . . . 31
Transmit Interrupt Level register (TXINTLVL) . 32
Receive Interrupt Level register (RXINTLVL) . 32
Flow Control Trigger Level High (FLWCNTH). 33
Flow Control Trigger Level Low (FLWCNTL) . 33
Clock Prescaler (CLKPRES) . . . . . . . . . . . . . 33
Sampling Rate (SAMPR) . . . . . . . . . . . . . . . . 34
RS-485 turn-around time delay (RS485TIME) 34
Advanced Feature Control Register 1
(AFCR1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Advanced Feature Control Register 2
(AFCR2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
SC16C852SV external reset condition and
software reset. . . . . . . . . . . . . . . . . . . . . . . . . 36
Timing diagrams. . . . . . . . . . . . . . . . . . . . . . . 39
Introduction to soldering. . . . . . . . . . . . . . . . . 44
Wave and reflow soldering . . . . . . . . . . . . . . . 44
Wave soldering. . . . . . . . . . . . . . . . . . . . . . . . 44
Reflow soldering. . . . . . . . . . . . . . . . . . . . . . . 45
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 47
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 47
SC16C852SV
Document identifier: SC16C852SV_1
Date of release: 23 September 2008
All rights reserved.