sc16c2552b NXP Semiconductors, sc16c2552b Datasheet - Page 3

• Manufacturer Part Number: sc16c2552b
• Description: Sc16c2552b 5 V, 3.3 V And 2.5 V Dual Uart, 5 Mbit/s Max. , With 16-byte Fifos
• Manufacturer: NXP Semiconductors

Philips Semiconductors
5. Pinning information
Table 2:
9397 750 14442
Product data
Symbol
A0-A2
CHSEL
CS
D0-D7
GND
Pin description
Pin
10, 14,
15
16
18
2-9
12, 22
5.1 Pinning
5.2 Pin description
Type
I
I
I
I/O
I
Fig 2. PLCC44 pin configuration.
Description
Register select. A0-A2 are used during read and write operations to select the UART
register to read from or write to.
Channel Select. UART channel A or B is selected by the logical state of this pin when
the CS is a logic 0. A logic 0 on CHSEL selects the UART channel ‘B’, while a logic 1
selects UART channel ‘A’. Bit 0 of AFR register can temporarily override CHSEL
function, allowing user to write to both channel registers simultaneously with 1 write
cycle.
Chip Select (Active-LOW). This function is selects channel ‘A’ or ‘B’, in accordance
with the logical state of the CHSEL pin. This allows data to be transferred between the
user CPU and the SC16C2552B.
Data bus (bi-directional). These pins are the 8-bit, 3-State data bus for transferring
information to or from the controlling CPU.
Signal and power ground.
CHSEL
XTAL1
XTAL2
INTB
GND
D5
D6
D7
A0
A1
A2
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 16-byte FIFOs
10
11
12
13
14
15
16
17
Rev. 02 — 13 December 2004
7
8
9
SC16C2552BIA44
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
SC16C2552B
002aaa488
39
38
37
36
35
34
33
32
31
30
29
RXA
TXA
DTRA
RTSA
MFA
INTA
V cc
TXRDYB
RIB
CDB
DSRB
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