xr20m1170 Exar Corporation, xr20m1170 Datasheet - Page 20
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xr20m1170
Manufacturer Part Number
xr20m1170
Description
I2c/spi Uart With 64-byte Fifo
Manufacturer
Exar Corporation
Datasheet
1.XR20M1170.pdf
(60 pages)
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XR20M1170
I2C/SPI UART WITH 64-BYTE FIFO
REV. 1.0.0
2.14.2
Auto Address Detection
Auto address detection mode is enabled when EFCR bit-0 = 1 and EFR bit-5 = 1. The desired slave address
will need to be written into the XOFF2 register. The receiver will try to detect an address byte that matches the
porgrammed character in the XOFF2 register. If the received byte is a data byte or an address byte that does
not match the programmed character in the XOFF2 register, the receiver will discard these data. Upon
receiving an address byte that matches the XOFF2 character, the receiver will be automatically enabled if not
already enabled, and the address character is pushed into the RX FIFO along with the parity bit (in place of the
parity error bit). The receiver also generates an LSR interrupt. The receiver will then receive the subsequent
data. If another address byte is received and this address does not match the programmed XOFF2 character,
then the receiver will automatically be disabled and the address byte is ignored. If the address byte matches
XOFF2, the receiver will put this byte in the RX FIFO along with the parity bit in the parity error bit.
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