isppac-clk5620v-01t48c Lattice Semiconductor Corp., isppac-clk5620v-01t48c Datasheet - Page 9

no-image

isppac-clk5620v-01t48c

Manufacturer Part Number
isppac-clk5620v-01t48c
Description
In-system Programmable, Zero-delay Clock Generator With Universal Fan-out Buffer
Manufacturer
Lattice Semiconductor Corp.
Datasheet
Lattice Semiconductor
Programmable Input and Output Termination Characteristics
R
R
OUT
IN
Symbol
Input Resistance
Output Resistance
Parameter
Rin=40 setting
Rin=45 setting
Rin=50 setting
Rin=55 setting
Rin=60 setting
Rin=65 setting
Rin=70 setting
Rout 20 setting, VCCO=1.5V
Rout 20 setting, VCCO=1.8V
Rout 20 setting, VCCO=2.5V
Rout 20 setting, VCCO=3.3V
Rout=40 setting
Rout=45 setting
Rout=50 setting
Rout=55 setting
Rout=60 setting
Rout=65 setting
Rout=70 setting
Conditions
9
ispClock5600 Family Data Sheet
Min.
40.5
49.5
36
45
54
59
61
34
38
43
47
51
55
61
Typ.
27
22
20
18
Max.
49.5
60.5
71.5
44
55
66
77
47
55
61
67
72
78
83
Units

Related parts for isppac-clk5620v-01t48c