m24lr16e-r STMicroelectronics, m24lr16e-r Datasheet - Page 27

• Manufacturer Part Number: m24lr16e-r
• Description: 16 Kbit Eeprom With Password Protection, Dual Interface & Energy Harvesting 400 Khz I²c Bus & Iso 15693 Rf Protocol At 13.56 Mhz
• Manufacturer: STMicroelectronics

M24LR16E
4.2
4.3
4.3.1
M24LR16E-R block security in I²C mode (I2C_Write_Lock bit
area)
In the I
This feature is controlled by the I2C_Write_Lock bits stored in the 2 bytes of the
I2C_Write_Lock bit area. I2C_Write_Lock bit area starts from location 2048 (see
To access the I2C_Write_Lock bit area, the device select code used for any I
must have the E2 Chip Enable address at 1.
Using these 16 bits, it is possible to write-protect all the 16 sectors of the M24LR16E-R
memory. Each bit controls the I
is always possible to unprotect a sector in the I
reset to 0, the corresponding sector is unprotected. When the bit is set to 1, the
corresponding sector is write-protected.
In I
depends on the correct presentation of the I
On delivery, the default value of the eight bytes of the I2C_Write_Lock bit area is reset to
00h.
Table 13.
Configuration byte and Control register
The M24LR16E-R offers an 8-bit non-volatile Configuration byte located at I²C location 2320
of the system area used to store the RF WIP/BUSY pin and the energy harvesting
configuration (see
The M24LR16E-R also offers an 8-bit volatile Control register located at I²C location 2336 of
the system area used to store the energy harvesting enable bit as well as a FIELD_ON bit
indicator (see
RF WIP/BUSY pin configuration
The M24LR16E-R features a configurable open drain output RF WIP/BUSY pin used to
provide RF activity information to an external device.
The RF WIP/BUSY pin functionality depends on the value of bit 3 of the Configuration byte.
●
When bit 3 of the Configuration byte is set to 0, the RF WIP/BUSY pin is configured in RF
busy mode.
The purpose of this mode is to indicate to the I²C bus master whether the M24LR16E-R is
busy in RF mode or not.
In this mode, the RF WIP/BUSY pin is tied to 0 from the RF command Start Of Frame (SOF)
until the end of the command execution.
m
2
C mode, read access to the I2C_Write_Lock bit area is always allowed. Write access
RF busy mode
2
E2 = 1
C mode only, it is possible to protect individual sectors against Write operations.
I
2
I2C_Write_Lock bit
C byte address
Table
Table
15).
14).
2048
Doc ID 018932 Rev 7
2
C write access to a specific sector as shown in
2
C password.
2
sectors 15-8
Bits [15:8]
C mode. When an I2C_Write_Lock bit is
System memory area
sectors 7-0
Bits [7:0]
2
C command
Table
Table
13. It
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13).