clc2000 Cadeka Microcircuits LLC., clc2000 Datasheet - Page 13

• Manufacturer Part Number: clc2000
• Description: High Output Current Dual Amplifer
• Manufacturer: Cadeka Microcircuits LLC.

Data Sheet
Application Information
Basic Operation
Figures 1 and 2 illustrate typical circuit configurations for
non-inverting, inverting, and unity gain topologies for dual
supply applications. They show the recommended bypass
capacitor values and overall closed loop gain equations.
Power Supply and Decoupling
The CLC2000 can be powered with a low noise supply
anywhere in the range from +5V to +13V. Ensure ad-
equate metal connections to power pins in the PC board
layout with careful attention paid to decoupling the power
supply.
High quality capacitors with low equivalent series resis-
tance (ESR) such as multilayer ceramic capacitors (MLCC)
should be used to minimize supply voltage ripple and
power dissipation.
©2004-2008 CADEKA Microcircuits LLC
Input
Input
Figure 1. Typical Non-Inverting Gain Circuit
Figure 2. Typical Inverting Gain Circuit
R
R
1
g
R
+
-
g
+V
-V
+
-
s
s
+V
-V
6.8μF
0.1μF
0.1μF
6.8μF
s
s
6.8μF
0.1μF
0.1μF
6.8μF
R
f
G = - (R
For optimum input offset
voltage set R
R
f
G = 1 + (R
R
f
/R
L
g
Output
)
1
= R
R
f
L
|| R
f
/R
Output
g
g
)
Two decoupling capacitors should be placed on each pow-
er pin with connection to a local PC board ground plane.
A large, usually tantalum, 10μF to 47μF capacitor is re-
quired to provide good decoupling for lower frequency
signals and to provide current for fast, large signal chang-
es at the CLC2000 outputs. It should be within 0.25” of
the pin. A secondary smaller 0.1μF MLCC capacitor should
located within 0.125” to reject higher frequency noise on
the power line.
Power Dissipation
Power dissipation is an important consideration in applica-
tions with low impedance DC, coupled loads. Guidelines
listed below can be used to verify that the particular ap-
plication will not cause the device to operate beyond its
intended operating range. Calculations below relate to a
single amplifier. For the CLC2000, both amplifiers power
contribution needs to be added for the total power dis-
sipation.
Maximum power levels are set by the absolute maximum
junction rating of 150°C. To calculate the junction tem-
perature, the package thermal resistance value Theta
(Ө
T
Where T
ment.
In order to determine P
needs to be subtracted from the total power delivered by
the supplies.
P
Supply power is calculated by the standard power equa-
tion.
P
V
Power delivered to a purely resistive load is:
P
The effective load resistor will need to include the effect
of the feedback network. For instance,
Rload
R
D
supply
load
Junction
supply
L
JA
= P
|| (R
) is used along with the total die power dissipation.
= ((V
eff
supply
= V
= V
f
Ambient
= T
in figure 1 would be calculated as:
+ R
supply
LOAD
(S+)
Ambient
- P
g
)
- V
)
load
is the temperature of the working environ-
RMS
× I
(S-)
+ (Ө
2
(RMS supply)
) / Rload
D
JA
, the power dissipated in the load
× P
eff
D
)
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13
JA