hsp50210 Intersil Corporation, hsp50210 Datasheet - Page 10

• Manufacturer Part Number: hsp50210
• Description: Digital Costas Loop
• Manufacturer: Intersil Corporation

The AGC Loop is configured by the Power Detect Threshold
and AGC Loop Parameters Control Registers (see Tables 15
and 16). Seven programmable parameters must be set to
configure the AGC Loop and its status outputs. Two
parameters, the Power Threshold and the AGC Threshold
are associated with the Error Detector and are represented
in 8-bit fractional unsigned binary format: 2
5
for the thresholds, the Cartesian to Polar Converter scales
the I and Q input magnitudes by 0.81. Thus, if a full scale
( 1) complex (I and Q) input signal is presented to the
converter, the output will be (0.81)
AGC Threshold parameter value is the desired magnitude of
the signal as it enters the Soft Decision Slicer. It is the
parameter that will determine the error signal in the AGC
loop. The Power Threshold, on the other hand, determines
only the power threshold at which the THRESH signal is
asserted. If the signal magnitude exceeds the threshold,
then the THRESH is asserted. This may be used for signal
detection, power detection or external AGC around the A/D
converter. The AGC Threshold parameter is set in the AGC
Loop Parameters Control Register, bits 16-23 (see Table 16).
The Power Threshold parameter is set in the Power Detect
Threshold Control Register, bits 0-7 (see Table 15). Note
that these two threshold parameters are not required to be
set to identical or even related values, since they perform
independent functions
The Enable AGC parameter sets the AGC Error Detector
output to zero if asserted and to normal error detection
output when not asserted. This control bit is set in the AGC
Loop Parameter Control Register, bit 31 (see Table 16). This
bit is used to disable the AGC loop.
The remaining AGC parameters determine the AGC loop
characteristics: gain tracking, tracking rate and tracking limits.
The AGC Loop gain is set via two parameters: AGC Loop
Gain Exponent and AGC Loop Gain Mantissa. In general, the
higher the loop gain, the faster signal level acquisition and
tracking, but this must be tempered by the specific signal
characteristics of the application and the remaining
programmable loop parameters. For the HSP50210, the AGC
Loop Gain provides for a variable attenuation of the input to
the loop filter. The AGC gain mantissa is a 4-bit value which
provides error signal scaling from 0.000 to 0.9375, with a
resolution of 0.0625. Table 2 details the discrete set of
decimal values possible for the AGC Loop Gain mantissa. The
2
-6
2
-7.
. While the format provides a range from 0 - 1.9961
3-10
2
+ (0.81)
0
.2
2
-1
= 1.1455. The
2
-2
2
-3
2
-4
2
HSP50210
-
exponent provides a shift factor scaling from 2
Table 3 details the discrete set of decimal values possible for
the AGC Loop Gain Exponent. When combined, the exponent
and mantissa provide a loop gain defined as:
AGC Loop Gain: G
where M is a binary number with a range from 0 to 15 and E
is a 3-bit binary value from 0 to 7. M and E are the
parameters set in the AGC Loop Parameters Control
Register, bits 24-30 (see Table 16). The composite range of
the AGC loop Gain is 0.0000 to [0.9375][2-7]. This will scale
the AGC error signal to a range of 0.000 to
(1.1455)(0.9375)(2-7) = 1.07297(2-7).
BINARY CODE
TABLE 2. AGC LOOP GAIN BINARY MANTISSA TO DECIMAL
TABLE 3. AGC LOOP BINARY EXPONENT TO SCALED
(MMMM)
BINARY
CODE
0000
0001
0010
0011
0100
0101
0110
0111
(EEE)
000
001
010
011
100
101
110
111
SCALED MANTISSA MAPPING
DECIMAL EXPONENT MAPPING
AGC
MANTISSA
DECIMAL
SCALED
0.0000
0.0625
0.1250
0.1875
0.2500
0.3125
0.3750
0.4375
DECIMAL/ HEX
=
EXPONENT
M 2
0
1
2
3
4
5
6
7
–
4
(MMMM)
BINARY
CODE
1000
1001
1010
1011
1100
1101
1110
1111
2
–
7
+
DECIMAL SCALED
E
EXPONENT
-7
to 2
MANTISSA
2
2
2
2
2
DECIMAL
2
2
2
SCALED
-10
-11
-12
-13
-14
-7
-8
-9
0.5000
0.5625
0.6250
0.6875
0.7500
0.8125
0.8750
0.9375
-14
.
(EQ. 7)