ia186xl Innovasic Semiconductor Inc., ia186xl Datasheet - Page 31

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ia186xl

Manufacturer Part Number
ia186xl
Description
16-bit Microcontroller
Manufacturer
Innovasic Semiconductor Inc.
Datasheet

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IA186XL/IA188XL
16-Bit Microcontrollers
Table 8. IA188XL Pin/Signal Descriptions (Continued)
error_n
Signal
rfsh_n
den_n
clkout
dt/r_n
busy
drq0
drq1
ardy
ale
mcs1_n/error_n
test_n/busy
ale/qs0
rfsh_n
den_n
Name
clkout
dt/r_n
drq0
drq1
ardy
®
PLCC
61
55
64
47
56
39
18
19
40
37
Pin
UNCONTROLLED WHEN PRINTED OR COPIED
PQFP
10
20
29
19
38
61
60
37
40
7
ENG211080711-01
Page 31 of 72
LQFP
29
37
26
46
36
56
79
78
54
58
address latch enable. Output. Active High.
This signal is used to latch the address
information during the address portion of a
bus cycle.
asynchronous ready tells the processor the
addressed memory space or i/o device will
complete the transfer.
rfsh_n is asserted low to indicate a refresh
bus cycle
busy. Input. Active High. When the busy
input is asserted, it causes the IA186XL to
suspend operation during the execution of the
Intel 80C187 Numerics Coprocessor
instructions. Operation resumes when the pin
is sampled low.
clock output. Output. The clkout pin
provides a timing reference for inputs and
outputs of the IA186XL. This clock output is
one-half the input clock (clkin) frequency.
The clkout signal has a 50% duty cycle,
transitioning every falling edge of clkin.
data enable. Output. Active Low. This signal
is used to enable of bidirectional transceivers
in a buffered system. The den_n signal is
asserted (low) only when data are to be
transferred on the bus.
dma request0 or 1 is asserted high by an
external device when ready for DMA Channel
0 or 1 to perform a transfer. These signals
are level-triggered and internally synchronized
data transmit/receive. Output. This signal is
used to control the direction of data flow for
bidirectional buffers in a buffered system.
When dt/r_n is high, the direction indicated is
transmit; when dt/r_n is low, the direction
indicated is receive.
error. Input. Active Low. When this signal is
asserted (low), it indicates that the last
numerics coprocessor operation resulted in an
exception condition
Description
Preliminary Data Sheet
September 30, 2008
http://www.Innovasic.com
Customer Support:
1-888-824-4184

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