ak4682 AKM Semiconductor, Inc., ak4682 Datasheet - Page 16

• Manufacturer Part Number: ak4682
• Description: Multi-channel Codec With 2vrms Stereo Selector
• Manufacturer: AKM Semiconductor, Inc.

2. Auto Setting Mode (ACKS bit = “1”)
When the ACKS bit = “1”, DAC is in Auto Setting Mode and the sampling speed is selected automatically by the ratio
MCLKA/LRCKA as shown in the Table 8. and the internal master clock is set to the appropriate frequency (Table 9). In
this mode, the setting of DFS1-0 bits are ignored.
■
The DAC1, DAC2 bits select the output data for each DAC.
MS0610-E-01
DAC Audio Data Control
176.4kHz
192.0kHz
LRCKA
32.0kHz
44.1kHz
48.0kHz
88.2kHz
96.0kHz
fs
Table 7. DAC system clock example (DAC Quad Speed Mode @Manual Setting Mode)
176.4kHz
192.0kHz
LRCKA
DAC1 bit
DAC2 bit
Fs
22.5792
24.5760
0
1
0
1
128fs
Table 8. DAC Sampling Speed (ACKS bit = “1”, Auto Setting Mode)
-
-
-
-
-
512fs, 768fs
256fs, 384fs
128fs, 192fs
MCLKA
Table 9. DAC System clock example (Auto Setting Mode)
22.5792
24.5760
33.8688
36.8640
(Note: ADC is always in Normal Speed Mode)
128fs
192fs
TDMA bit = “0”
TDMA bit = “0”
Normal Mode
Normal Mode
-
-
-
-
-
SDTIA1
SDTIA2
SDTIA1
SDTIA2
Table 10. DAC1 Source Control
Table 11. DAC2 Source Control
22.5792
24.5760
256fs
MCLKA (MHz)
33.8688
36.8640
Normal Speed Mode
Double Speed Mode
-
-
-
-
-
Quad Speed Mode
192fs
DAC1 Source
DAC2 Source
MCLKA (MHz)
DAC Sampling Speed (fs) LRCKA
- 16 -
33.8688
36.8640
384fs
-
-
-
-
-
TDMA bit = “1”
TDMA bit = “1”
TDM Mode
TDM Mode
256fs
-
-
L1, R1
L2, R2
L1, R1
L2, R2
16.3840
22.5792
24.5760
512fs
120kHz~192kHz
-
-
-
-
32kHz~48kHz
64kHz~96kHz
384fs
-
-
24.5760
33.8688
36.8640
768fs
-
-
-
-
(default)
(default)
BICKA (MHz)
Sampling
Normal
Double
Speed
Quad
11.2896
12.2880
64fs
[AK4682]
2007/07