ak4682 AKM Semiconductor, Inc., ak4682 Datasheet - Page 17

• Manufacturer Part Number: ak4682
• Description: Multi-channel Codec With 2vrms Stereo Selector
• Manufacturer: AKM Semiconductor, Inc.

■
The AK4682 includes the digital de-emphasis filter (tc=50/15μs) by IIR filter. This filter corresponds to three sampling
frequencies (32kHz, 44.1kHz, 48kHz). De-emphasis filter is off in Double speed mode and Quad speed mode. De-
emphasis of each DAC can be set individually by register.
■
The ADC has a digital high pass filter for DC offset cancel. The cut-off frequency of the HPF is 1.0Hz at fs=48kHz and
scales with sampling rate (fs).
■
Each PORTA/B can select independent audio interface format. The TDMA, DIFA1-0 bits control the audio format for
PORTA and support normal mode and TDM128 mode. The DIFB1-0 bits control the audio format for PORTB and
support only normal mode. The default is mode 2. In all modes the serial data is MSB-first, 2’s complement format. The
SDTOB pins are clocked out on the falling edge of BICKB pins and the SDTIA1-0 pins are latched on the rising edge
of BICKA pins.
MS0610-E-01
1. Setting for the PORTA
1-1. Normal mode: TDMA bit = “0” (default)
1-2. TDM 128 mode: TDMA bit = “1”
De-emphasis Filter
ADC Digital High Pass Filter
Audio Serial Interface Format
The TDMA bit = “0” sets the AK4682 audio serial interface format to the normal mode. The DIFA1-0 bits select
following eight serial data format (Table 13).
The TDMA bits = “1” set the AK4682 audio serial interface format to the TDM 128 mode. The four channel serial
data (SDTIA1, 2) is input to the SDTIA1 pin. The data of SDTIA2 pin is not used. The TDM 128 mode is not
available in Quad Speed Mode.
Mode
Mode
0
1
2
3
10
11
8
9
DIFA1
bit
DIFA1
0
0
1
1
bit
0
0
1
1
DIFA0
bit
DIFA0
0
1
0
1
Mode
bit
0
1
0
1
0
1
2
3
Table 14. Audio Interface Format (TDM 128 mode.)
Table 13 Audio Interface Format (Normal mode.)
20bit, Right justified
24bit, Right justified
24bit, Left justified
20bit, Right justified
24bit, Right justified
24bit, Left justified
(DEM21)
DEM11
SDTIA1-2
Table 12. De-emphasis control
24bit, I
SDTIA1-2
24bit, I
0
0
1
1
2
S
2
S
(DEM20)
- 17 -
DEM10
0
1
0
1
start
H/L
H/L
H/L
L/H
L/R
↑
↑
↑
↓
LRCKA
LRCKA
44.1kHz
48kHz
32kHz
DEM
OFF
I/O
I/O
I
I
I
I
I
I
I
I
(default)
≥ 48fs
≥ 48fs
≥ 48fs
≥ 48fs
speed
speed
128fs
128fs
128fs
128fs
BICKA
BICKA
I/O
I/O
I
I
I
I
I
I
I
I
(default)
(default)
[AK4682]
2007/07