ml7074-001ga Oki Semiconductor, ml7074-001ga Datasheet - Page 20

• Manufacturer Part Number: ml7074-001ga
• Description: Speech Codec
• Manufacturer: Oki Semiconductor

These are the analog transmit input and transmit level adjust pins. Each of AIN0N and AIN1N is connected to
Notice:
It is recommended that the amplifier to be used is selected before the conversation starts, since a small amount of
These are analog receive output pins and are connected to the output pins of the built-in receive amplifiers AMP2
Notice:
It is recommended that the amplifier to be used is selected before the conversation starts, since a small amount of
At the time of resetting or releasing from the reset state, it is recommended to select the AVREF as outputs of
PIN FUNCTION DESCRIPTIONS
AIN0N, AIN0P, GSX0, AIN1N, GSX1
each of the inverting input pins of the built-in transmit amplifiers AMP0 and AMP1, and AIN0P is connected to
the non-inverting input pin of AMP0. In addition, GSX0 and GSX1 are connected to the output pins of AMP0
and AMP1, respectively. The selection between AMP0 and AMP1 is made by CR10-B0. See figure 9 for the
method of making level adjustment. During the power-down mode (when PDNB = “0” or CR0-B7 = “1”), the
outputs of GSX0 and GSX1 go to the high impedance state. If AMP0 is not used in the specific application of
this ML7074, short GSX0 with AIN0N and connect AIN0P with AVREF. When AMP1 is not used, short GSX1
with AIN1N.
noise will be generated if the amplifier selection is changed while the conversation is in progress.
VFRO0, VFRO1
and AMP3, respectively. The output signals of VFRO0 and VFRO1 can be selected using CR10-B1 and CR10-
B2, respectively. When selected (“1”), the received signal will be output, and when deselected (“0”), the
AVREF signal (about 1.4 V) will be output. In power-down mode, these pins will be in the high impedance
state. It is recommended to use these output signals via DC coupling capacitors.
noise will be generated if the amplifier selection is changed while the conversation is in progress.
VFRO0 and VFRO1.
Oki Semiconductor
Gain = R2/R1 <=
63(+36dB)
R1 : Variable
R2 : Max 500k
Gain = R4/R3 <=63(+36dB)
R1 : Variable
R2 : Max 500k
Out : Max 1.3Vp-p
Out : Max 1.3Vp-p
2.2 to 4.7µF
Figure 9 Analog interface
C1
C2
C5
R3
R1
+
C4
R4
R2
C3
C6 0.1µF
VFRO0
VFRO1
AVREF
AIN0N
AIN0P
AIN1N
GSX0
GSX1
10kΩ
10kΩ
AMP2
AMP0
AMP1
AMP3
10kΩ
10κΩ
VREF
CR10-B0
CR10-B2
CR10-B1
A/D
D/A
ML7074-001GA
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