ml87v5002 Oki Semiconductor, ml87v5002 Datasheet - Page 21

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ml87v5002

Manufacturer Part Number
ml87v5002
Description
Audio Delay Ic With Built-in 2-mbit Dram
Manufacturer
Oki Semiconductor
Datasheet
This register specifies the data bit length, I
of the LRCK.
OKI Semiconductor
Input data format setting
Register Name
Register Name
Default Value
DI_LEN
DATA_BIT
POLI
FMTI
[1:0]
[1:0]
WR
RD
Table 15 Descriptions of Input Data Format Setting Register Functions
Specifies the polarity of the LRCKI.
Specifies the input format.
Specifies the input data bit length.
* This field is not valid in Through mode.
1: Inverted
0: Non-inverted
00: Left justified (MSB)
00: Right justified (LSB)
10, 11: I
00: 16 bits
01: 20 bits
10: 24 bits
11: 32 bits
BIT7
Table 14 Input Data Format Setting Register Map
0
SUB_ADDRESS=01h(R/W)
2
S
I
Left justified (MSB)
Right justified (LSB)
2
BIT6
S
0
2
S, input data formats (left justified and right justified), and the polarity
BIT5
Description
0
POLI
BIT4
POL=1
LRCKI
LEFT
1
0
0
V
V
0
BIT3
RIGHT
0
1
1
V
V
0
FMTI
BIT2
POL=0
LRCKI
LEFT
0
1
1
V
V
0
RIGHT
1
0
0
BIT1
V
V
0
DI_LEN
FEDL87V5002-01
ML87V5002
BIT0
V
V
0
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