ml87v5002 Oki Semiconductor, ml87v5002 Datasheet - Page 23

• Manufacturer Part Number: ml87v5002
• Description: Audio Delay Ic With Built-in 2-mbit Dram
• Manufacturer: Oki Semiconductor

This register specifies the cycle of BCKO which is generated internally when INT_EXT of the mode setting
register is “1”.
This register specifies the cycle of LRCKO which is generated internally when INT_EXT of the mode setting
register is “1”.
Note: Both of the registers BCK_DIV and LRCK_DIV should be configured. The new data is valid if the both
OKI Semiconductor
BCKO cycle setting
LRCKO Cycle Setting
Register Name
Default Value
Register Name
registers are configured. For example, when only the BCK_DIV register is to be changed, the BCK_DIV
register is first configured, then the LRCK_DIV register should be configured with the value equal to the
current value.
Default Value
DATA_BIT
DATA_BIT
WR
RD
WR
RD
BIT7
BIT7
SUB_ADDRESS=03h(R/W)
0
0
SUB_ADDRESS=04h(R/W)
Table 19 LRCKO Cycle Setting Register Map
Table 18 BCKO Cycle Setting Register Map
BIT6
BIT6
0
0
BIT5
BIT5
0
V
V
0
BIT4
BIT4
V
V
1
0
BIT3
BIT3
V
V
0
V
V
0
LRCK_DIV
BIT2
BIT2
V
V
1
V
V
0
BCK_DIV
BIT1
BIT1
V
V
0
V
V
0
FEDL87V5002-01
ML87V5002
BIT0
BIT0
V
V
0
V
V
0
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