ml87v5002 Oki Semiconductor, ml87v5002 Datasheet - Page 27

• Manufacturer Part Number: ml87v5002
• Description: Audio Delay Ic With Built-in 2-mbit Dram
• Manufacturer: Oki Semiconductor

OKI Semiconductor
Delay operation start/stop, interrupt mask control
Register Name
Default Value
DATA_BIT
Register Name
AUTORSTRT
INT_MASK
WR
RD
ENBL
Table 29 Descriptions of Delay Operation Control Register Functions
ENBL
BIT7
Controls the delay operation.
* When the CFG_ERR bit is set due to the inconsistency in the setting even if the ENBL
Performs resynchronization automatically when an input timing error occurs.
* When this register is set to “1”, the INT output is fixed to a “H” level even if the
Masks interrupt outputs.
* When this register is set to “1”, the error statuses which cause interrupts are masked
0: Stop
1: Start
0: NOP
1: Automatic resynchronization
0: NOP
1: Mask
V
V
0
register is set to “1”, the delay operation is not started.
When the synchronization of LRCK and BCK is lost during the delay operation, the
ENBL register is set to “0” and the operation is suspended (AUTORSTRT = 0).
However, the error statuses which cause interrupts are set.
though the INT output is fixed to a “H” level.
INT_MASK is “0” except when the delay operation is suspended by CFG_ERR.
Table 28 Delay Operation Control Register Map
BIT6
0
BIT5
0
BIT4
SUB_ADDRESS=07h(R/W)
0
Description
BIT3
0
BIT2
0
AUTOR
STRT
BIT1
V
V
0
FEDL87V5002-01
ML87V5002
MASK
BIT0
INT
V
V
0
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